[dpdk-dev,v5,01/19] crypto/ccp: add AMD ccp skeleton PMD
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Commit Message
Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
---
MAINTAINERS | 6 +++++
config/common_base | 5 +++++
doc/guides/rel_notes/release_18_05.rst | 5 +++++
drivers/crypto/Makefile | 1 +
drivers/crypto/ccp/Makefile | 29 ++++++++++++++++++++++++
drivers/crypto/ccp/rte_ccp_pmd.c | 36 ++++++++++++++++++++++++++++++
drivers/crypto/ccp/rte_pmd_ccp_version.map | 4 ++++
mk/rte.app.mk | 2 ++
8 files changed, 88 insertions(+)
create mode 100644 drivers/crypto/ccp/Makefile
create mode 100644 drivers/crypto/ccp/rte_ccp_pmd.c
create mode 100644 drivers/crypto/ccp/rte_pmd_ccp_version.map
Comments
> -----Original Message-----
> From: Ravi Kumar [mailto:Ravi1.kumar@amd.com]
> Sent: Monday, March 19, 2018 12:24 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> hemant.agrawal@nxp.com
> Subject: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
>
> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
Patchset applied to dpdk-next-crypto, with same minor changes
(title changes and driver registering modification due to an earlier patch).
Thanks for the work!
Pablo
>
>
>> -----Original Message-----
>> From: Ravi Kumar [mailto:Ravi1.kumar@amd.com]
>> Sent: Monday, March 19, 2018 12:24 PM
>> To: dev@dpdk.org
>> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
>> hemant.agrawal@nxp.com
>> Subject: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
>>
>> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
>
>Patchset applied to dpdk-next-crypto, with same minor changes (title changes and driver registering modification due to an earlier patch).
>
>Thanks for the work!
>Pablo
>
Thanks a lot Pablo.
Regards,
Ravi
Hi Ravi,
> -----Original Message-----
> From: Kumar, Ravi1 [mailto:Ravi1.Kumar@amd.com]
> Sent: Monday, April 2, 2018 6:50 AM
> To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>; dev@dpdk.org
> Cc: hemant.agrawal@nxp.com
> Subject: RE: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
>
> >
> >
> >> -----Original Message-----
> >> From: Ravi Kumar [mailto:Ravi1.kumar@amd.com]
> >> Sent: Monday, March 19, 2018 12:24 PM
> >> To: dev@dpdk.org
> >> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
> >> hemant.agrawal@nxp.com
> >> Subject: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
> >>
> >> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
> >
> >Patchset applied to dpdk-next-crypto, with same minor changes (title changes
> and driver registering modification due to an earlier patch).
> >
> >Thanks for the work!
> >Pablo
> >
There's been a memory rework applied in DPDK at the same time I applied your PMD in next-crypto,
Which means that it is broken now. Could you submit a fix for it?
At least, compilation is broken now, but it may require more changes:
drivers/crypto/ccp/ccp_dev.c:98:7: error: implicit declaration of function 'rte_eal_get_physmem_layout' is invalid in C99
[-Werror,-Wimplicit-function-declaration]
ms = rte_eal_get_physmem_layout();
This function does not exist anymore.
Commit 2d84772bf858 ("crypto/qat: use contiguous allocation for DMA memory")
makes a similar required changed in QAT.
Take a look at it and see if it suits you.
>
> Thanks a lot Pablo.
>
> Regards,
> Ravi
>Hi Ravi,
>
>> -----Original Message-----
>> From: Kumar, Ravi1 [mailto:Ravi1.Kumar@amd.com]
>> Sent: Monday, April 2, 2018 6:50 AM
>> To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
>> dev@dpdk.org
>> Cc: hemant.agrawal@nxp.com
>> Subject: RE: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
>>
>> >
>> >
>> >> -----Original Message-----
>> >> From: Ravi Kumar [mailto:Ravi1.kumar@amd.com]
>> >> Sent: Monday, March 19, 2018 12:24 PM
>> >> To: dev@dpdk.org
>> >> Cc: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>;
>> >> hemant.agrawal@nxp.com
>> >> Subject: [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD
>> >>
>> >> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
>> >
>> >Patchset applied to dpdk-next-crypto, with same minor changes (title
>> >changes
>> and driver registering modification due to an earlier patch).
>> >
>> >Thanks for the work!
>> >Pablo
>> >
>
>There's been a memory rework applied in DPDK at the same time I applied your PMD in next-crypto, Which means that it is broken now. Could you submit a fix for it?
>At least, compilation is broken now, but it may require more changes:
>
>drivers/crypto/ccp/ccp_dev.c:98:7: error: implicit declaration of function 'rte_eal_get_physmem_layout' is invalid in C99
> [-Werror,-Wimplicit-function-declaration]
> ms = rte_eal_get_physmem_layout();
>
>This function does not exist anymore.
>Commit 2d84772bf858 ("crypto/qat: use contiguous allocation for DMA memory") makes a similar required changed in QAT.
>Take a look at it and see if it suits you.
>
Hi Pablo,
Sure, we will send updated patch for this.
Regards,
Ravi
>>
>> Thanks a lot Pablo.
>>
>> Regards,
>> Ravi
>
Hi,
19/03/2018 13:23, Ravi Kumar:
> --- a/config/common_base
> +++ b/config/common_base
> @@ -529,6 +529,11 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
> CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
>
> #
> +# Compile PMD for AMD CCP crypto device
> +#
> +CONFIG_RTE_LIBRTE_PMD_CCP=n
Why is it disabled by default?
>Hi,
>
>19/03/2018 13:23, Ravi Kumar:
>> --- a/config/common_base
>> +++ b/config/common_base
>> @@ -529,6 +529,11 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
>> CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
>>
>> #
>> +# Compile PMD for AMD CCP crypto device # CONFIG_RTE_LIBRTE_PMD_CCP=n
>
>Why is it disabled by default?
>
Hi Thomas,
The CCP HW crypto engines are available only on specific AMD platforms.
That is why we let the user decide when to enable.
Regards,
Ravi
Hi,
> -----Original Message-----
> From: Kumar, Ravi1 [mailto:Ravi1.Kumar@amd.com]
> Sent: Monday, April 23, 2018 7:37 AM
> To: Thomas Monjalon <thomas@monjalon.net>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>
> Cc: dev@dpdk.org; hemant.agrawal@nxp.com
> Subject: RE: [dpdk-dev] [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton
> PMD
>
> >Hi,
> >
> >19/03/2018 13:23, Ravi Kumar:
> >> --- a/config/common_base
> >> +++ b/config/common_base
> >> @@ -529,6 +529,11 @@
> CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
> >> CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
> >>
> >> #
> >> +# Compile PMD for AMD CCP crypto device #
> CONFIG_RTE_LIBRTE_PMD_CCP=n
> >
> >Why is it disabled by default?
> >
> Hi Thomas,
>
> The CCP HW crypto engines are available only on specific AMD platforms.
> That is why we let the user decide when to enable.
Actually, I thought this was disabled because this PMD has an external dependency with libcrypto.
>
> Regards,
> Ravi
23/04/2018 08:37, Kumar, Ravi1:
> >Hi,
> >
> >19/03/2018 13:23, Ravi Kumar:
> >> --- a/config/common_base
> >> +++ b/config/common_base
> >> @@ -529,6 +529,11 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
> >> CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
> >>
> >> #
> >> +# Compile PMD for AMD CCP crypto device # CONFIG_RTE_LIBRTE_PMD_CCP=n
> >
> >Why is it disabled by default?
> >
> Hi Thomas,
>
> The CCP HW crypto engines are available only on specific AMD platforms.
> That is why we let the user decide when to enable.
Most of the devices are not always available,
but they are enabled by default.
Can we enable this one from the first patch?
@@ -640,6 +640,12 @@ M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: doc/guides/cryptodevs/features/default.ini
+AMD CCP Crypto PMD
+M: Ravi Kumar <ravi1.kumar@amd.com>
+F: drivers/crypto/ccp/
+F: doc/guides/cryptodevs/ccp.rst
+F: doc/guides/cryptodevs/features/ccp.ini
+
ARMv8 Crypto
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
F: drivers/crypto/armv8/
@@ -529,6 +529,11 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n
CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y
#
+# Compile PMD for AMD CCP crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_CCP=n
+
+#
# Compile PMD for Marvell Crypto device
#
CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n
@@ -41,6 +41,11 @@ New Features
Also, make sure to start the actual text at the margin.
=========================================================
+* **Added a new crypto poll mode driver for AMD CCP devices.**
+
+ Added the new ``ccp`` crypto driver for AMD CCP devices. See the
+ :doc:`../cryptodevs/ccp` crypto driver guide for more details on
+ this new driver.
API Changes
-----------
@@ -20,5 +20,6 @@ endif
ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)
DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA_SEC) += dpaa_sec
endif
+DIRS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp
include $(RTE_SDK)/mk/rte.subdir.mk
new file mode 100644
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+# library name
+LIB = librte_pmd_ccp.a
+
+# build flags
+CFLAGS += -O3
+CFLAGS += -I$(SRCDIR)
+CFLAGS += $(WERROR_FLAGS)
+
+# library version
+LIBABIVER := 1
+
+# external library include paths
+LDLIBS += -lcrypto
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
+LDLIBS += -lrte_cryptodev
+LDLIBS += -lrte_pci -lrte_bus_pci
+
+# versioning export map
+EXPORT_MAP := rte_pmd_ccp_version.map
+
+# library source files
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += rte_ccp_pmd.c
+
+include $(RTE_SDK)/mk/rte.lib.mk
new file mode 100644
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Advanced Micro Devices, Inc. All rights reserved.
+ */
+
+#include <rte_bus_vdev.h>
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+
+uint8_t ccp_cryptodev_driver_id;
+
+/** Remove ccp pmd */
+static int
+cryptodev_ccp_remove(struct rte_vdev_device *dev __rte_unused)
+{
+ return 0;
+}
+
+/** Probe ccp pmd */
+static int
+cryptodev_ccp_probe(struct rte_vdev_device *vdev __rte_unused)
+{
+ return 0;
+}
+
+static struct rte_vdev_driver cryptodev_ccp_pmd_drv = {
+ .probe = cryptodev_ccp_probe,
+ .remove = cryptodev_ccp_remove
+};
+
+static struct cryptodev_driver ccp_crypto_drv;
+
+RTE_PMD_REGISTER_VDEV(CRYPTODEV_NAME_CCP_PMD, cryptodev_ccp_pmd_drv);
+RTE_PMD_REGISTER_PARAM_STRING(CRYPTODEV_NAME_CCP_PMD,
+ "max_nb_queue_pairs=<int> max_nb_sessions=<int> socket_id=<int>");
+RTE_PMD_REGISTER_CRYPTO_DRIVER(ccp_crypto_drv, cryptodev_ccp_pmd_drv,
+ ccp_cryptodev_driver_id);
new file mode 100644
@@ -0,0 +1,4 @@
+DPDK_18.05 {
+
+ local: *;
+};
@@ -221,6 +221,8 @@ ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DPAA_SEC) += -lrte_pmd_dpaa_sec
endif # CONFIG_RTE_LIBRTE_DPAA_BUS
+_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += -lrte_pmd_ccp -lcrypto
+
endif # CONFIG_RTE_LIBRTE_CRYPTODEV
ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y)