[v3] net/i40e: fix incorrect byte counters
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Commit Message
This patch fixed the issue that rx/tx bytes statistics counters
overflowed on 48 bit limitation by enlarging the limitation.
Fixes: 4861cde46116 ("i40e: new poll mode driver")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
---
doc/guides/nics/i40e.rst | 7 +++++++
drivers/net/i40e/i40e_ethdev.c | 32 ++++++++++++++++++++++++++++++++
drivers/net/i40e/i40e_ethdev.h | 9 +++++++++
3 files changed, 48 insertions(+)
Comments
On 9/21/2020 10:59 AM, Junyu Jiang wrote:
> This patch fixed the issue that rx/tx bytes statistics counters
> overflowed on 48 bit limitation by enlarging the limitation.
>
> Fixes: 4861cde46116 ("i40e: new poll mode driver")
> Cc: stable@dpdk.org
>
> Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
> ---
> doc/guides/nics/i40e.rst | 7 +++++++
> drivers/net/i40e/i40e_ethdev.c | 32 ++++++++++++++++++++++++++++++++
> drivers/net/i40e/i40e_ethdev.h | 9 +++++++++
> 3 files changed, 48 insertions(+)
>
> diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst
> index b7430f6c4..4baa58be6 100644
> --- a/doc/guides/nics/i40e.rst
> +++ b/doc/guides/nics/i40e.rst
> @@ -830,3 +830,10 @@ Tx bytes affected by the link status change
>
> For firmware versions prior to 6.01 for X710 series and 3.33 for X722 series, the tx_bytes statistics data is affected by
> the link down event. Each time the link status changes to down, the tx_bytes decreases 110 bytes.
> +
> +RX/TX statistics may be incorrect when register overflowed
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +The rx_bytes/tx_bytes statistics register is 48 bit length. Although this limitation is enlarged to 64 bit length
> +on the software side, but there is no way to detect if the overflow occurred more than once. So rx_bytes/tx_bytes
> +statistics data is correct when statistics are updated at least once between two overflows.
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 563f21d9d..212338ef0 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -3052,6 +3052,19 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
> return ret;
> }
>
> +static void
> +i40e_stat_update_48_in_64(uint64_t *new_bytes,
> + uint64_t *prev_bytes,
> + bool offset_loaded)
> +{
> + if (offset_loaded) {
> + if (I40E_RXTX_BYTES_L_48_BIT(*prev_bytes) > *new_bytes)
> + *new_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
> + *new_bytes += I40E_RXTX_BYTES_H_16_BIT(*prev_bytes);
> + }
> + *prev_bytes = *new_bytes;
> +}
> +
I was more thinking reading stats and extending in same function,
instead of extracting the extending part into its own function, like:
static void
i40e_stat_update_48_in_64(struct i40e_hw *hw,
uint32_t hireg,
uint32_t loreg,
bool offset_loaded,
uint64_t *offset,
uint64_t *stat,
uint64_t *prev_bytes) {
i40e_stat_update_48(...)
/* logic to convert 'stat' to 64 bits */
}
Does it make sense?
@@ -830,3 +830,10 @@ Tx bytes affected by the link status change
For firmware versions prior to 6.01 for X710 series and 3.33 for X722 series, the tx_bytes statistics data is affected by
the link down event. Each time the link status changes to down, the tx_bytes decreases 110 bytes.
+
+RX/TX statistics may be incorrect when register overflowed
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The rx_bytes/tx_bytes statistics register is 48 bit length. Although this limitation is enlarged to 64 bit length
+on the software side, but there is no way to detect if the overflow occurred more than once. So rx_bytes/tx_bytes
+statistics data is correct when statistics are updated at least once between two overflows.
@@ -3052,6 +3052,19 @@ i40e_dev_link_update(struct rte_eth_dev *dev,
return ret;
}
+static void
+i40e_stat_update_48_in_64(uint64_t *new_bytes,
+ uint64_t *prev_bytes,
+ bool offset_loaded)
+{
+ if (offset_loaded) {
+ if (I40E_RXTX_BYTES_L_48_BIT(*prev_bytes) > *new_bytes)
+ *new_bytes += (uint64_t)1 << I40E_48_BIT_WIDTH;
+ *new_bytes += I40E_RXTX_BYTES_H_16_BIT(*prev_bytes);
+ }
+ *prev_bytes = *new_bytes;
+}
+
/* Get all the statistics of a VSI */
void
i40e_update_vsi_stats(struct i40e_vsi *vsi)
@@ -3073,6 +3086,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
i40e_stat_update_48(hw, I40E_GLV_BPRCH(idx), I40E_GLV_BPRCL(idx),
vsi->offset_loaded, &oes->rx_broadcast,
&nes->rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ i40e_stat_update_48_in_64(&nes->rx_bytes, &vsi->prev_rx_bytes,
+ vsi->offset_loaded);
/* exclude CRC bytes */
nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast +
nes->rx_broadcast) * RTE_ETHER_CRC_LEN;
@@ -3099,6 +3115,9 @@ i40e_update_vsi_stats(struct i40e_vsi *vsi)
/* GLV_TDPC not supported */
i40e_stat_update_32(hw, I40E_GLV_TEPC(idx), vsi->offset_loaded,
&oes->tx_errors, &nes->tx_errors);
+ /* enlarge the limitation when tx_bytes overflowed */
+ i40e_stat_update_48_in_64(&nes->tx_bytes, &vsi->prev_tx_bytes,
+ vsi->offset_loaded);
vsi->offset_loaded = true;
PMD_DRV_LOG(DEBUG, "***************** VSI[%u] stats start *******************",
@@ -3171,6 +3190,13 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw)
pf->offset_loaded,
&pf->internal_stats_offset.tx_broadcast,
&pf->internal_stats.tx_broadcast);
+ /* enlarge the limitation when internal rx/tx bytes overflowed */
+ i40e_stat_update_48_in_64(&pf->internal_stats.rx_bytes,
+ &pf->internal_prev_rx_bytes,
+ pf->offset_loaded);
+ i40e_stat_update_48_in_64(&pf->internal_stats.tx_bytes,
+ &pf->internal_prev_tx_bytes,
+ pf->offset_loaded);
/* exclude CRC size */
pf->internal_stats.rx_bytes -= (pf->internal_stats.rx_unicast +
@@ -3194,6 +3220,9 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw)
I40E_GLPRT_BPRCL(hw->port),
pf->offset_loaded, &os->eth.rx_broadcast,
&ns->eth.rx_broadcast);
+ /* enlarge the limitation when rx_bytes overflowed */
+ i40e_stat_update_48_in_64(&ns->eth.rx_bytes, &pf->prev_rx_bytes,
+ pf->offset_loaded);
/* Workaround: CRC size should not be included in byte statistics,
* so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx
* packet.
@@ -3252,6 +3281,9 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw)
I40E_GLPRT_BPTCL(hw->port),
pf->offset_loaded, &os->eth.tx_broadcast,
&ns->eth.tx_broadcast);
+ /* enlarge the limitation when tx_bytes overflowed */
+ i40e_stat_update_48_in_64(&ns->eth.tx_bytes, &pf->prev_tx_bytes,
+ pf->offset_loaded);
ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast +
ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN;
@@ -282,6 +282,9 @@ struct rte_flow {
#define I40E_ETH_OVERHEAD \
(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE * 2)
+#define I40E_RXTX_BYTES_H_16_BIT(bytes) ((bytes) & ~I40E_48_BIT_MASK)
+#define I40E_RXTX_BYTES_L_48_BIT(bytes) ((bytes) & I40E_48_BIT_MASK)
+
struct i40e_adapter;
struct rte_pci_driver;
@@ -399,6 +402,8 @@ struct i40e_vsi {
uint8_t vlan_anti_spoof_on; /* The VLAN anti-spoofing enabled */
uint8_t vlan_filter_on; /* The VLAN filter enabled */
struct i40e_bw_info bw_info; /* VSI bandwidth information */
+ uint64_t prev_rx_bytes;
+ uint64_t prev_tx_bytes;
};
struct pool_entry {
@@ -1156,6 +1161,10 @@ struct i40e_pf {
uint16_t switch_domain_id;
struct i40e_vf_msg_cfg vf_msg_cfg;
+ uint64_t prev_rx_bytes;
+ uint64_t prev_tx_bytes;
+ uint64_t internal_prev_rx_bytes;
+ uint64_t internal_prev_tx_bytes;
};
enum pending_msg {