From patchwork Fri Jan 5 21:12:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 538 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 903594383C; Fri, 5 Jan 2024 13:45:06 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2DCBF402E7; Fri, 5 Jan 2024 13:45:06 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id DBAA1402BF for ; Fri, 5 Jan 2024 13:45:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704458705; x=1735994705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PiLuflRYfUU3YUTfRMJz0/HTBcrRN/zCH2HQ7yEScr8=; b=msLHY3NrBW9txD8xia4eBDq/1Ks2hnyQib+NS2GKaxYPgOHDaDyywCmh BqLTz0TlVlQbpEUdhLlDToAW4JkHezS46LZVaFD3R7dLBOQUhMa6E1dey brE15I/I9IOZzbqRLOwhW3Tw+Hn94ynkRgxgTRD/mvoJpkLAJsFEGI3u9 0hOeAyD4Nrp3NzRK7z8n3X8nMnQZh1Qskrz8IzA2BSrtCrf0fOUKux6YP uALiI36VCD2RLBFN2z/GXlxj15JRovukkQS3YSWI/eZmAKSJFzP4ZFtVx BaKuExKNgrgJ5V/yNJc4040IHFsBw6Jk0c3+aUVmXCeuyc7itwu1VZKEJ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10943"; a="376988414" X-IronPort-AV: E=Sophos;i="6.04,333,1695711600"; d="scan'208";a="376988414" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2024 04:45:03 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10943"; a="730468544" X-IronPort-AV: E=Sophos;i="6.04,333,1695711600"; d="scan'208";a="730468544" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.119.16]) by orsmga003.jf.intel.com with ESMTP; 05 Jan 2024 04:45:01 -0800 From: Qi Zhang To: qiming.yang@intel.com, wenjun1.wu@intel.com Cc: dev@dpdk.org, Qi Zhang Subject: [PATCH v3 0/3] net/ice: simplified to 3 layer Tx scheduler Date: Fri, 5 Jan 2024 16:12:34 -0500 Message-Id: <20240105211237.394105-1-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20240105135906.383394-1-qi.z.zhang@intel.com> References: <20240105135906.383394-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Remove dummy layers, code refactor, complete document v3: - fix tm_node memory free. - fix corrupt when slibling node deletion is not in a reversed order. v2: - fix typos. Qi Zhang (3): net/ice: hide port and TC layer in Tx sched tree net/ice: refactor tm config data structure doc: update ice document for qos doc/guides/nics/ice.rst | 19 +++ drivers/net/ice/ice_ethdev.h | 12 +- drivers/net/ice/ice_tm.c | 313 +++++++++++++---------------------- 3 files changed, 132 insertions(+), 212 deletions(-)