@@ -4376,6 +4376,7 @@ s32 ixgbe_get_hi_status(struct ixgbe_hw *hw, u8 *ret_status)
* @buffer: contains the command to write and where the return status will
* be placed
* @length: length of buffer, must be multiple of 4 bytes
+ * @timeout: time in ms to wait for command completion
* @return_data: read and return data from the buffer (true) or not (false)
* Needed because FW structures are big endian and decoding of
* these fields can be 8 bit or 16 bit based on command. Decoding
@@ -4387,12 +4388,12 @@ s32 ixgbe_get_hi_status(struct ixgbe_hw *hw, u8 *ret_status)
* else return IXGBE_ERR_HOST_INTERFACE_COMMAND.
**/
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
- u32 length, bool return_data)
+ u32 length, u32 timeout, bool return_data)
{
u32 hicr, i, bi, fwsts;
u32 hdr_size = sizeof(struct ixgbe_hic_hdr);
u16 buf_len;
- u8 dword_len;
+ u16 dword_len;
DEBUGFUNC("ixgbe_host_interface_command");
@@ -4429,7 +4430,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
/* Setting this bit tells the ARC that a new command is pending. */
IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);
- for (i = 0; i < IXGBE_HI_COMMAND_TIMEOUT; i++) {
+ for (i = 0; i < timeout; i++) {
hicr = IXGBE_READ_REG(hw, IXGBE_HICR);
if (!(hicr & IXGBE_HICR_C))
break;
@@ -4437,7 +4438,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
}
/* Check command completion */
- if (i == IXGBE_HI_COMMAND_TIMEOUT ||
+ if ((timeout != 0 && i == timeout) ||
!(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) {
ERROR_REPORT1(IXGBE_ERROR_CAUTION,
"Command has failed with no status valid.\n");
@@ -4522,7 +4523,9 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) {
ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
- sizeof(fw_cmd), true);
+ sizeof(fw_cmd),
+ IXGBE_HI_COMMAND_TIMEOUT,
+ true);
if (ret_val != IXGBE_SUCCESS)
continue;
@@ -157,7 +157,7 @@ s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
s32 ixgbe_get_hi_status(struct ixgbe_hw *hw, u8 *ret_status);
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
- u32 length, bool return_data);
+ u32 length, u32 timeout, bool return_data);
void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
@@ -74,7 +74,7 @@ POSSIBILITY OF SUCH DAMAGE.
#include "ixgbe_osdep.h"
-#ident "$Id: ixgbe_type.h,v 1.630 2013/11/22 22:48:40 jtkirshe Exp $"
+/* Override this by setting IOMEM in your ixgbe_osdep.h header */
/* Vendor ID */
#define IXGBE_INTEL_VENDOR_ID 0x8086
@@ -2731,6 +2731,9 @@ enum ixgbe_fdir_pballoc_type {
#define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
#define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */
#define IXGBE_HI_COMMAND_TIMEOUT 500 /* Process HI command limit */
+#define IXGBE_HI_FLASH_ERASE_TIMEOUT 1000 /* Process Erase command limit */
+#define IXGBE_HI_FLASH_UPDATE_TIMEOUT 5000 /* Process Update command limit */
+#define IXGBE_HI_FLASH_APPLY_TIMEOUT 0 /* Process Apply command limit */
/* CEM Support */
#define FW_CEM_HDR_LEN 0x4
@@ -1278,7 +1278,8 @@ s32 ixgbe_read_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16));
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
- sizeof(buffer), false);
+ sizeof(buffer),
+ IXGBE_HI_COMMAND_TIMEOUT, false);
if (status)
return status;
@@ -1357,7 +1358,9 @@ s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw,
buffer.length = IXGBE_CPU_TO_BE16(words_to_read * 2);
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
- sizeof(buffer), false);
+ sizeof(buffer),
+ IXGBE_HI_COMMAND_TIMEOUT,
+ false);
if (status) {
DEBUGOUT("Host interface command failed\n");
@@ -1413,7 +1416,8 @@ s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,
buffer.address = IXGBE_CPU_TO_BE32(offset * 2);
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
- sizeof(buffer), false);
+ sizeof(buffer),
+ IXGBE_HI_COMMAND_TIMEOUT, false);
return status;
}
@@ -1728,7 +1732,8 @@ s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw)
buffer.checksum = FW_DEFAULT_CHECKSUM;
status = ixgbe_host_interface_command(hw, (u32 *)&buffer,
- sizeof(buffer), false);
+ sizeof(buffer),
+ IXGBE_HI_COMMAND_TIMEOUT, false);
return status;
}
@@ -1797,7 +1802,7 @@ void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)
status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,
sizeof(struct ixgbe_hic_disable_rxen),
- true);
+ IXGBE_HI_COMMAND_TIMEOUT, true);
/* If we fail - disable RX using register write */
if (status) {