From patchwork Tue Mar 29 09:39:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fiona Trahe X-Patchwork-Id: 11774 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 625315591; Tue, 29 Mar 2016 11:48:56 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 1B6CF558E for ; Tue, 29 Mar 2016 11:48:53 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP; 29 Mar 2016 02:48:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,410,1455004800"; d="scan'208";a="943564669" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga002.jf.intel.com with ESMTP; 29 Mar 2016 02:48:51 -0700 Received: from linux.site (sisvmlab045.ir.intel.com [10.237.216.57]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id u2T9mpfn014203; Tue, 29 Mar 2016 10:48:51 +0100 Received: by linux.site (Postfix, from userid 11342333) id 217E9E3BC2; Tue, 29 Mar 2016 10:40:10 +0100 (IST) From: Fiona Trahe To: dev@dpdk.org Cc: Declan.doherty@intel.com, Arek Kusztal Date: Tue, 29 Mar 2016 10:39:08 +0100 Message-Id: <1459244349-20476-2-git-send-email-fiona.trahe@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1459244349-20476-1-git-send-email-fiona.trahe@intel.com> References: <1459244349-20476-1-git-send-email-fiona.trahe@intel.com> Subject: [dpdk-dev] [PATCH 1/2] driver/crypto: out-of-place symmetric operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Arek Kusztal Driver now support out of place crypto operations, driver assumes both buffers can be of different size. Signed-off-by: Arek Kusztal --- doc/guides/cryptodevs/qat.rst | 1 - drivers/crypto/qat/qat_crypto.c | 22 +++++++++++++--------- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index af90b46..4b8f782 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -62,7 +62,6 @@ Limitations * Chained mbufs are not supported. * Hash only is not supported except Snow3G UIA2. * Cipher only is not supported except Snow3G UEA2. -* Only in-place is currently supported (destination address is the same as source address). * Only supports the session-oriented API implementation (session-less APIs are not supported). * Not performance tuned. * Snow3g(UEA2) supported only if cipher length, cipher offset fields are byte-aligned. diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c index 29c1fe5..55884d6 100644 --- a/drivers/crypto/qat/qat_crypto.c +++ b/drivers/crypto/qat/qat_crypto.c @@ -689,17 +689,21 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg) *qat_req = ctx->fw_req; qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op; - /* - * The following code assumes: - * - single entry buffer. - * - always in place. - */ qat_req->comn_mid.dst_length = - qat_req->comn_mid.src_length = - rte_pktmbuf_data_len(op->sym->m_src); + qat_req->comn_mid.src_length = + rte_pktmbuf_data_len(op->sym->m_src); + qat_req->comn_mid.dest_data_addr = - qat_req->comn_mid.src_data_addr = - rte_pktmbuf_mtophys(op->sym->m_src); + qat_req->comn_mid.src_data_addr = + rte_pktmbuf_mtophys(op->sym->m_src); + + if (unlikely(op->sym->m_dst != NULL)) { + qat_req->comn_mid.dest_data_addr = + rte_pktmbuf_mtophys(op->sym->m_dst); + qat_req->comn_mid.dst_length = + rte_pktmbuf_data_len(op->sym->m_dst); + } + cipher_param = (void *)&qat_req->serv_specif_rqpars; auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));