diff mbox

[dpdk-dev,v6,4/8] cryptodev/armv8: introduce ARM-specific feature flags

Message ID 1484769721-43938-5-git-send-email-zbigniew.bodek@caviumnetworks.com (mailing list archive)
State Accepted, archived
Headers show

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel compilation fail apply patch file failure

Commit Message

zbigniew.bodek@caviumnetworks.com Jan. 18, 2017, 8:01 p.m. UTC 
From: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>

Add two new feature flags:
* RTE_CRYPTODEV_FF_CPU_NEON
  represents ARM NEON (TM) instructions
* RTE_CRYPTODEV_FF_CPU_ARM_CE
  represents ARM crypto extensions

Add them to both cryptodev library, documentation and relevant
PMD driver for ARMv8.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
---
 doc/guides/cryptodevs/overview.rst   | 2 ++
 drivers/crypto/armv8/rte_armv8_pmd.c | 4 +++-
 lib/librte_cryptodev/rte_cryptodev.c | 4 ++++
 lib/librte_cryptodev/rte_cryptodev.h | 5 +++++
 4 files changed, 14 insertions(+), 1 deletion(-)
diff mbox

Patch

diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index bd5f0ad..9ec32f1 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -45,6 +45,8 @@  Supported Feature Flags
    "RTE_CRYPTODEV_FF_CPU_AVX512",,,x,,,,
    "RTE_CRYPTODEV_FF_CPU_AESNI",,,x,x,,,
    "RTE_CRYPTODEV_FF_HW_ACCELERATED",x,,,,,,
+   "RTE_CRYPTODEV_FF_CPU_NEON",,,,,,,
+   "RTE_CRYPTODEV_FF_CPU_ARM_CE",,,,,,,
 
 Supported Cipher Algorithms
 
diff --git a/drivers/crypto/armv8/rte_armv8_pmd.c b/drivers/crypto/armv8/rte_armv8_pmd.c
index 1bf0f9d..d2b88a3 100644
--- a/drivers/crypto/armv8/rte_armv8_pmd.c
+++ b/drivers/crypto/armv8/rte_armv8_pmd.c
@@ -826,7 +826,9 @@ 
 	dev->enqueue_burst = armv8_crypto_pmd_enqueue_burst;
 
 	dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
-			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;
+			RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+			RTE_CRYPTODEV_FF_CPU_NEON |
+			RTE_CRYPTODEV_FF_CPU_ARM_CE;
 
 	/* Set vector instructions mode supported */
 	internals = dev->data->dev_private;
diff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c
index f2ceb9b..6a51eec 100644
--- a/lib/librte_cryptodev/rte_cryptodev.c
+++ b/lib/librte_cryptodev/rte_cryptodev.c
@@ -240,6 +240,10 @@  struct rte_cryptodev_callback {
 		return "HW_ACCELERATED";
 	case RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER:
 		return "MBUF_SCATTER_GATHER";
+	case RTE_CRYPTODEV_FF_CPU_NEON:
+		return "CPU_NEON";
+	case RTE_CRYPTODEV_FF_CPU_ARM_CE:
+		return "CPU_ARM_CE";
 	default:
 		return NULL;
 	}
diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h
index 452b174..f284668 100644
--- a/lib/librte_cryptodev/rte_cryptodev.h
+++ b/lib/librte_cryptodev/rte_cryptodev.h
@@ -232,6 +232,11 @@  struct rte_cryptodev_capabilities {
 /**< Utilises CPU SIMD AVX512 instructions */
 #define	RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER	(1ULL << 9)
 /**< Scatter-gather mbufs are supported */
+#define	RTE_CRYPTODEV_FF_CPU_NEON		(1ULL << 10)
+/**< Utilises CPU NEON instructions */
+#define	RTE_CRYPTODEV_FF_CPU_ARM_CE		(1ULL << 11)
+/**< Utilises ARM CPU Cryptographic Extensions */
+
 
 
 /**