From patchwork Fri Sep 15 16:00:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 28767 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C56601B194; Fri, 15 Sep 2017 18:00:36 +0200 (CEST) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 7ABFF1B162 for ; Fri, 15 Sep 2017 18:00:33 +0200 (CEST) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 15 Sep 2017 19:00:28 +0300 Received: from dev-r630-05.mtbc.labs.mlnx (dev-r630-05.mtbc.labs.mlnx [10.12.205.160]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id v8FG0Rna030833; Fri, 15 Sep 2017 19:00:27 +0300 Received: from dev-r630-05.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-05.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id v8FG0R9d072250; Sat, 16 Sep 2017 00:00:27 +0800 Received: (from xuemingl@localhost) by dev-r630-05.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id v8FG0RaS072249; Sat, 16 Sep 2017 00:00:27 +0800 From: Xueming Li To: Nelio Laranjeiro , Adrien Mazarguil Cc: dev@dpdk.org, Xueming Li Date: Sat, 16 Sep 2017 00:00:00 +0800 Message-Id: <1505491200-72127-6-git-send-email-xuemingl@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1505491200-72127-1-git-send-email-xuemingl@mellanox.com> References: <20170824140341.95471-1-xuemingl@mellanox.com> <1505491200-72127-1-git-send-email-xuemingl@mellanox.com> Subject: [dpdk-dev] [PATCH v2 6/6] net/mlx5: multi-process document update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch update the feature list and NIC guide to be multi-process enabled. Signed-off-by: Xueming Li Acked-by: Nelio Laranjeiro --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index 99a8d93..2913591 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -34,6 +34,7 @@ Tx descriptor status = Y Basic stats = Y Extended stats = Y Stats per queue = Y +Multiprocess aware = Y Other kdrv = Y ARMv8 = Y Power8 = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index ffa20a2..5c77dea 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -92,7 +92,7 @@ Features - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and RTE_ETH_FDIR_REJECT). - Flow API. -- Secondary process TX is supported. +- Multiple process. - KVM and VMware ESX SR-IOV modes are supported. - RSS hash result is supported. - Hardware TSO. @@ -106,7 +106,6 @@ Limitations - Inner RSS for VXLAN frames is not supported yet. - Port statistics through software counters only. - Hardware checksum RX offloads for VXLAN inner header are not supported yet. -- Secondary process RX is not supported. - Flow pattern without any specific vlan will match for vlan packets as well: When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.