From patchwork Fri Oct 20 12:39:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrien Mazarguil X-Patchwork-Id: 30643 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 72B1B4C57; Fri, 20 Oct 2017 14:40:11 +0200 (CEST) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id 6C83E1B205 for ; Fri, 20 Oct 2017 14:40:10 +0200 (CEST) Received: by mail-wm0-f68.google.com with SMTP id 196so476839wma.1 for ; Fri, 20 Oct 2017 05:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:mime-version:content-disposition; bh=PJoIGRHubPdtA7XkHJ39LQjRJ7gmAZNyWL1mcr15w18=; b=mYh0Q1Nd/y+r3S5iTfbHpalMIWPNRUfTgPkQrLziuDZ28kx50qC1qorCWhDW/yo8JO 2xJI3A9EdonbOtjnuNanL6hdLJA3mgdjRl4teOIxZLDp3cGDXZ96mZ+BYUnxSQ+gp1h5 Q3R8MNrmXU+ScJwtuszcuGMB4CGxpPnVU/UmFRqn0uPAQqcYgpJEXt7RGhuUeXYOUFx0 iVloxztx8w8KkJeAkOOcpkcDPv44QlPWRLKsXTRdBD9fo25qkXsbrL8t4UmqeEo5U70m 5k7pT8ucp9rLK3EBACkFJ8zWlEasfNBS4In4h+ktdEOnmyiI8c+43HaZW9Tkexzn1rTw n8gw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:mime-version :content-disposition; bh=PJoIGRHubPdtA7XkHJ39LQjRJ7gmAZNyWL1mcr15w18=; b=Z+f2GO2B3FGr6pS4TTFMcvF/LAgPBkyORmu7uMH6aNVjUpSawCxYXK331oAC/7tg5s sJUePhrkeoWnM1Hq/gwbyGvgb74JxxqC6xFMI4a69DFsR9k6nwnjJL6C1dHyqGuURYam /o0FULcCYhOfY0H1DYGMlS6vhbBkXT18GhLNj/JrB0W7Ar1xES/0TDp/v7wHX97aKnTc q3VWEHQHad6ejCGDFzdUfEFP9xq+F5+Ie+656knJ5wjKVksYQZYCAMfTIHIm71MH34m/ n/W32MWJ74WP1137d1shckWmgvISsPcUpFsEKw6K5JnfMdFjQ8ByRGY1gCfPtu+kRBC5 zWTQ== X-Gm-Message-State: AMCzsaVJc9pnBJvpPrhu++kKj3ay1wwZ1JBDfIJz9aCvrfsW35hf+1Rh 8VA/si6HU0ejtRUmQ+WPAqNJ3hBb X-Google-Smtp-Source: ABhQp+T+INcdYR6L8iz/PzGodfQkdE4WG5MA4DfMioLnjaal894YauQ5iE/n0sVx8TKDmk2abS0sCw== X-Received: by 10.80.245.129 with SMTP id u1mr6474484edm.232.1508503209899; Fri, 20 Oct 2017 05:40:09 -0700 (PDT) Received: from 6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id 88sm1067239edq.49.2017.10.20.05.40.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 20 Oct 2017 05:40:08 -0700 (PDT) Date: Fri, 20 Oct 2017 14:39:58 +0200 From: Adrien Mazarguil To: Ferruh Yigit Cc: dev@dpdk.org Message-ID: <1508503129-6298-1-git-send-email-adrien.mazarguil@6wind.com> MIME-Version: 1.0 Content-Disposition: inline X-Mailer: git-send-email 2.1.4 Subject: [dpdk-dev] [PATCH] net/mlx4: fix restriction on TCP/UDP flow rules X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The code as currently written requires TCP/UDP source and destination ports to be always specified. No such restriction is enforced by hardware; all TCP and UDP traffic can be matched by providing an empty mask for these fields. Fixes: 680d5280c20b ("net/mlx4: refactor flow item validation code") Signed-off-by: Adrien Mazarguil Acked-by: Nelio Laranjeiro --- drivers/net/mlx4/mlx4_flow.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx4/mlx4_flow.c b/drivers/net/mlx4/mlx4_flow.c index 5af6efb..a0f431b 100644 --- a/drivers/net/mlx4/mlx4_flow.c +++ b/drivers/net/mlx4/mlx4_flow.c @@ -404,7 +404,7 @@ mlx4_flow_merge_udp(struct rte_flow *flow, struct ibv_flow_spec_tcp_udp *udp; const char *msg; - if (!mask || + if (mask && ((uint16_t)(mask->hdr.src_port + 1) > UINT16_C(1) || (uint16_t)(mask->hdr.dst_port + 1) > UINT16_C(1))) { msg = "mlx4 does not support matching partial UDP fields"; @@ -464,7 +464,7 @@ mlx4_flow_merge_tcp(struct rte_flow *flow, struct ibv_flow_spec_tcp_udp *tcp; const char *msg; - if (!mask || + if (mask && ((uint16_t)(mask->hdr.src_port + 1) > UINT16_C(1) || (uint16_t)(mask->hdr.dst_port + 1) > UINT16_C(1))) { msg = "mlx4 does not support matching partial TCP fields";