diff mbox

[dpdk-dev] net/i40e: change VF default ITR interval

Message ID 1514354509-146422-1-git-send-email-beilei.xing@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Helin Zhang
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Xing, Beilei Dec. 27, 2017, 6:01 a.m. UTC 
  Current default ITR interval I40E_QUEUE_ITR_INTERVAL_DEFAULT is
used by both DPDK PF and DPDK VF, but this ITR interval value
will cause lots of interrupts when using VF. This patch modifies
VF default ITR interval to reduce interrupts.
ITR interval can be configured by RTE_LIBRTE_I40E_ITR_INTERVAL
if expecting low latency.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c    |  6 +++---
 drivers/net/i40e/i40e_ethdev.h    | 11 ++++++++---
 drivers/net/i40e/i40e_ethdev_vf.c |  4 ++--
 3 files changed, 13 insertions(+), 8 deletions(-)

Comments

Jingjing Wu Dec. 27, 2017, 6:18 a.m. UTC | #1 
> -----Original Message-----
> From: Xing, Beilei
> Sent: Wednesday, December 27, 2017 2:02 PM
> To: Wu, Jingjing <jingjing.wu@intel.com>
> Cc: dev@dpdk.org
> Subject: [PATCH] net/i40e: change VF default ITR interval
> 
> Current default ITR interval I40E_QUEUE_ITR_INTERVAL_DEFAULT is
> used by both DPDK PF and DPDK VF, but this ITR interval value
> will cause lots of interrupts when using VF. This patch modifies
> VF default ITR interval to reduce interrupts.
> ITR interval can be configured by RTE_LIBRTE_I40E_ITR_INTERVAL
> if expecting low latency.
> 
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>

Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Zhang, Helin Jan. 9, 2018, 7:52 a.m. UTC | #2 
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wu, Jingjing
> Sent: Wednesday, December 27, 2017 2:19 PM
> To: Xing, Beilei
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH] net/i40e: change VF default ITR interval
> 
> 
> 
> > -----Original Message-----
> > From: Xing, Beilei
> > Sent: Wednesday, December 27, 2017 2:02 PM
> > To: Wu, Jingjing <jingjing.wu@intel.com>
> > Cc: dev@dpdk.org
> > Subject: [PATCH] net/i40e: change VF default ITR interval
> >
> > Current default ITR interval I40E_QUEUE_ITR_INTERVAL_DEFAULT is used
> > by both DPDK PF and DPDK VF, but this ITR interval value will cause
> > lots of interrupts when using VF. This patch modifies VF default ITR
> > interval to reduce interrupts.
> > ITR interval can be configured by RTE_LIBRTE_I40E_ITR_INTERVAL if
> > expecting low latency.
> >
> > Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> 
> Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Applied to dpdk-next-net-intel, thanks!

/Helin
diff mbox

Patch

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 9916f49..d2b50d4 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -1658,7 +1658,7 @@  __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
 	/* Write first RX queue to Link list register as the head element */
 	if (vsi->type != I40E_VSI_SRIOV) {
 		uint16_t interval =
-			i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
+			i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 1);
 
 		if (msix_vect == I40E_MISC_VEC_ID) {
 			I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0,
@@ -1789,7 +1789,7 @@  i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 	struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
 	uint16_t interval = i40e_calc_itr_interval(\
-		RTE_LIBRTE_I40E_ITR_INTERVAL);
+		RTE_LIBRTE_I40E_ITR_INTERVAL, 1);
 	uint16_t msix_intr, i;
 
 	if (rte_intr_allow_others(intr_handle))
@@ -10743,7 +10743,7 @@  i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	uint16_t interval =
-		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
+		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 1);
 	uint16_t msix_intr;
 
 	msix_intr = intr_handle->intr_vec[queue_id];
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index cd67453..d4cff71 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -189,6 +189,7 @@  enum i40e_flxpld_layer_idx {
 #define I40E_ITR_INDEX_NONE             3
 #define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
 #define I40E_QUEUE_ITR_INTERVAL_MAX     8160 /* 8160 us */
+#define I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT 8160 /* 8160 us */
 /* Special FW support this floating VEB feature */
 #define FLOATING_VEB_SUPPORTED_FW_MAJ 5
 #define FLOATING_VEB_SUPPORTED_FW_MIN 0
@@ -1274,10 +1275,14 @@  i40e_align_floor(int n)
 }
 
 static inline uint16_t
-i40e_calc_itr_interval(int16_t interval)
+i40e_calc_itr_interval(int16_t interval, bool is_pf)
 {
-	if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
-		interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+	if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX) {
+		if (is_pf)
+			interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+		else
+			interval = I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT;
+	}
 
 	/* Convert to hardware count, as writing each 1 represents 2 us */
 	return interval / 2;
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c
index 4927b14..a2e460a 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1165,7 +1165,7 @@  i40evf_init_vf(struct rte_eth_dev *dev)
 	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 	uint16_t interval =
-		i40e_calc_itr_interval(I40E_QUEUE_ITR_INTERVAL_MAX);
+		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0);
 
 	vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
 	vf->dev_data = dev->data;
@@ -1868,7 +1868,7 @@  i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	uint16_t interval =
-		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
+		i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0);
 	uint16_t msix_intr;
 
 	msix_intr = intr_handle->intr_vec[queue_id];