From patchwork Tue Jan 9 20:17:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 33301 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 579881B232; Wed, 10 Jan 2018 04:26:26 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 825A51B1F9 for ; Wed, 10 Jan 2018 04:26:20 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2018 19:26:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,338,1511856000"; d="scan'208";a="10043708" Received: from dpdk27.sh.intel.com ([10.67.111.90]) by orsmga006.jf.intel.com with ESMTP; 09 Jan 2018 19:26:19 -0800 From: Qi Zhang To: beilei.xing@intel.com Cc: dev@dpdk.org, jingjing.wu@intel.com, Qi Zhang Date: Tue, 9 Jan 2018 15:17:16 -0500 Message-Id: <1515529044-10168-17-git-send-email-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515529044-10168-1-git-send-email-qi.z.zhang@intel.com> References: <1515529044-10168-1-git-send-email-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 16/24] net/i40e/base: add defines for flat NVM X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" New control bits were defined for flat NVM structure. One for pointing which NVM bank is currently used and one used as indicator of structure type. Signed-off-by: Qi Zhang --- drivers/net/i40e/base/i40e_type.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 056ca4d1d..a062816c6 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -1538,6 +1538,8 @@ struct i40e_hw_port_stats { #define I40E_SR_PCIE_ALT_MODULE_MAX_SIZE 1024 #define I40E_SR_CONTROL_WORD_1_SHIFT 0x06 #define I40E_SR_CONTROL_WORD_1_MASK (0x03 << I40E_SR_CONTROL_WORD_1_SHIFT) +#define I40E_SR_CONTROL_WORD_1_NVM_BANK_VALID BIT(5) +#define I40E_SR_NVM_MAP_STRUCTURE_TYPE BIT(12) /* Shadow RAM related */ #define I40E_SR_SECTOR_SIZE_IN_WORDS 0x800