From patchwork Mon Mar 12 04:17:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zijie Pan X-Patchwork-Id: 36062 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D7A21AABB; Tue, 13 Mar 2018 13:55:59 +0100 (CET) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id 2B88C1F1C for ; Mon, 12 Mar 2018 05:18:00 +0100 (CET) Received: by mail-wm0-f68.google.com with SMTP id a20so11454290wmd.1 for ; Sun, 11 Mar 2018 21:18:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:in-reply-to:references; bh=CUU4HTyRbemmiTNDo1AKiyHqjwOyJQHgN/MdAph13BI=; b=FcClPfm07LrZ58B9gVc/Ncyyt5Q1z/f5DxqI5aoh8uYOMXKcnBAsXJVkY51IKGK3Zt 0dN1Y5xOurG5U6Vao1+DnORs5d4OebS4bk8wCgvtYlQG01aXyIwFUH+SDE16W6s0V4Oq 88PnS9+WJoj0WMxMojTkw4SLaqP8ZBJpFfebp4f8X/qBNhMec/LUODEMPYyaXDbTjf6D TwEzfe2oh7okhtAG+mq4c2YiN7H/pBUXliJAUQcTUjpCDGrSrWTD06Zjh5+AEMGc8TWr ox1awCxRUzqndY+dV3HqyJ38gjlXarSU5dKhdcuL2fa2RR2EThOF93K33YnHJu+17zwr A/ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=CUU4HTyRbemmiTNDo1AKiyHqjwOyJQHgN/MdAph13BI=; b=q6pylCXSSLtUKUCPc1Y/laiaIW8B2nWb01g+2wha2bShxH4kQUcLv+Fx3kmq3naxZ8 ePEW5E/SH3Hsu4M2k94xU4Gk6iAejEvkKf5vmtQPV7rJmO69oBb21HH+BBvTQctGVc/b cawmVOaBDKMyLGLLssXLfwrw7+pCRSLvJ/aCvx4nuGQGMHYMtYt4TgzvASHFoVDgGYWY rg+hxwnEpGSaR2boXa3Dfn4aXPd5QIeZzolWqO9edZPIMKVS8STTA37SySmx2hrRmx/y OYbJzJr0rIpwuA3b/DbPLSpHFpHUVGtPuVqj8CyxQqSYc0cGz3XXYXbWAYD3b49MtV1J gTUA== X-Gm-Message-State: AElRT7Hk0ghytUIFHiyWzbKkqx9GiinV5ggNFrVgU5ckfdKZtqaTPqkn R36Zq4sBnH60y4t8GBKLIWG4rs6D X-Google-Smtp-Source: AG47ELvV8Jalvk/7wKo3Z2E8kGVZCWyQwfn5eRzudP8Rl9ABlAK/LksKU1VxZPRzeLOQy5EmmWGT3w== X-Received: by 10.28.13.136 with SMTP id 130mr4706840wmn.123.1520828279715; Sun, 11 Mar 2018 21:17:59 -0700 (PDT) Received: from cougar.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id t91sm13113866wrc.21.2018.03.11.21.17.58 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Mar 2018 21:17:59 -0700 (PDT) From: Zijie Pan To: dev@dpdk.org Date: Mon, 12 Mar 2018 05:17:22 +0100 Message-Id: <1520828243-25191-5-git-send-email-zijie.pan@6wind.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1520828243-25191-1-git-send-email-zijie.pan@6wind.com> References: <1520828243-25191-1-git-send-email-zijie.pan@6wind.com> X-Mailman-Approved-At: Tue, 13 Mar 2018 13:55:53 +0100 Subject: [dpdk-dev] [PATCH 4/5] net/e1000: add module EEPROM callbacks for e1000 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add new callbacks for eth_dev_ops of e1000 to get the information and data of plugin module EEPROM. Signed-off-by: Zijie Pan --- drivers/net/e1000/base/e1000_phy.h | 8 ++++ drivers/net/e1000/igb_ethdev.c | 83 ++++++++++++++++++++++++++++++++++++ 2 files changed, 91 insertions(+) diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h index 3e45a9e..2cd0e14 100644 --- a/drivers/net/e1000/base/e1000_phy.h +++ b/drivers/net/e1000/base/e1000_phy.h @@ -330,4 +330,12 @@ struct sfp_e1000_flags { #define E1000_SFF_VENDOR_OUI_AVAGO 0x00176A00 #define E1000_SFF_VENDOR_OUI_INTEL 0x001B2100 +/* EEPROM byte offsets */ +#define IGB_SFF_8472_SWAP 0x5C +#define IGB_SFF_8472_COMP 0x5E + +/* Bitmasks */ +#define IGB_SFF_ADDRESSING_MODE 0x4 +#define IGB_SFF_8472_UNSUP 0x00 + #endif diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 3c5138d..048caaf 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -224,6 +224,10 @@ static int eth_igb_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); static int eth_igb_set_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom); +static int eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_dev_module_info *modinfo); +static int eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info); static int eth_igb_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set, uint32_t nb_mc_addr); @@ -403,6 +407,8 @@ static void eth_igb_write_ivar(struct e1000_hw *hw, uint8_t msix_vector, .get_eeprom_length = eth_igb_get_eeprom_length, .get_eeprom = eth_igb_get_eeprom, .set_eeprom = eth_igb_set_eeprom, + .get_module_info = eth_igb_get_module_info, + .get_module_eeprom = eth_igb_get_module_eeprom, .timesync_adjust_time = igb_timesync_adjust_time, .timesync_read_time = igb_timesync_read_time, .timesync_write_time = igb_timesync_write_time, @@ -5384,6 +5390,83 @@ static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on) } static int +eth_igb_get_module_info(struct rte_eth_dev *dev, + struct rte_dev_module_info *modinfo) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t sff8472_rev, addr_mode; + bool page_swap = false; + + if (hw->phy.media_type == e1000_media_type_copper || + hw->phy.media_type == e1000_media_type_unknown) + return -EOPNOTSUPP; + + /* Check whether we support SFF-8472 or not */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev); + if (status) + return -EIO; + + /* addressing mode is not supported */ + status = e1000_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode); + if (status) + return -EIO; + + /* addressing mode is not supported */ + if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) { + PMD_DRV_LOG(ERR, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); + page_swap = true; + } + + if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) { + /* We have an SFP, but it does not support SFF-8472 */ + modinfo->type = ETH_MODULE_SFF_8079; + modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; + } else { + /* We have an SFP which supports a revision of SFF-8472 */ + modinfo->type = ETH_MODULE_SFF_8472; + modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; + } + + return 0; +} + +static int +eth_igb_get_module_eeprom(struct rte_eth_dev *dev, + struct rte_dev_eeprom_info *info) +{ + struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + uint32_t status = 0; + uint16_t dataword[ETH_MODULE_SFF_8472_LEN / 2 + 1]; + u16 first_word, last_word; + int i = 0; + + if (info->length == 0) + return -EINVAL; + + first_word = info->offset >> 1; + last_word = (info->offset + info->length - 1) >> 1; + + /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */ + for (i = 0; i < last_word - first_word + 1; i++) { + status = e1000_read_phy_reg_i2c(hw, (first_word + i) * 2, + &dataword[i]); + if (status) { + /* Error occurred while reading module */ + return -EIO; + } + + dataword[i] = rte_be_to_cpu_16(dataword[i]); + } + + memcpy(info->data, (u8 *)dataword + (info->offset & 1), info->length); + + return 0; +} + +static int eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) { struct e1000_hw *hw =