diff mbox series

[v2,3/4] test/hash: add readwrite test for ext table

Message ID 1540404570-102126-4-git-send-email-yipeng1.wang@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers show
Series hash: improve multiple places | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Wang, Yipeng1 Oct. 24, 2018, 6:09 p.m. UTC
This commit improves the readwrite test to consider
extendable table feature and add more functional tests
to cover more corner cases.

Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
---
 test/test/test_hash_readwrite.c | 70 ++++++++++++++++++++++++++++++++++-------
 1 file changed, 58 insertions(+), 12 deletions(-)

Comments

Bruce Richardson Oct. 25, 2018, 9:34 a.m. UTC | #1
On Wed, Oct 24, 2018 at 11:09:29AM -0700, Yipeng Wang wrote:
> This commit improves the readwrite test to consider
> extendable table feature and add more functional tests
> to cover more corner cases.
> 
> Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
> ---

Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Honnappa Nagarahalli Oct. 26, 2018, 12:32 a.m. UTC | #2
> Subject: [PATCH v2 3/4] test/hash: add readwrite test for ext table
> 
> This commit improves the readwrite test to consider extendable table
> feature and add more functional tests to cover more corner cases.
> 
I think the part covering the more corner cases should go into a separate commit.

> Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
> ---
>  test/test/test_hash_readwrite.c | 70
> ++++++++++++++++++++++++++++++++++-------
>  1 file changed, 58 insertions(+), 12 deletions(-)
> 
> diff --git a/test/test/test_hash_readwrite.c
> b/test/test/test_hash_readwrite.c index a8fadd0..13c28e0 100644
> --- a/test/test/test_hash_readwrite.c
> +++ b/test/test/test_hash_readwrite.c
> @@ -21,6 +21,8 @@
>  #define TOTAL_ENTRY (16*1024*1024)
>  #define TOTAL_INSERT (15*1024*1024)
> 
> +#define TOTAL_INSERT_EXT (16*1024*1024)
> +
>  #define NUM_TEST 3
>  unsigned int core_cnt[NUM_TEST] = {2, 4, 8};
> 
> @@ -59,8 +61,10 @@ test_hash_readwrite_worker(__attribute__((unused))
> void *arg)
>  	uint64_t i, offset;
>  	uint32_t lcore_id = rte_lcore_id();
>  	uint64_t begin, cycles;
> -	int ret;
> +	int *ret;
> 
> +	ret = rte_malloc(NULL, sizeof(int) *
> +				tbl_rw_test_param.num_insert, 0);
This memory needs to be freed.

>  	for (i = 0; i < rte_lcore_count(); i++) {
>  		if (slave_core_ids[i] == lcore_id)
>  			break;
> @@ -79,13 +83,30 @@ test_hash_readwrite_worker(__attribute__((unused))
> void *arg)
>  				tbl_rw_test_param.keys + i) > 0)
>  			break;
> 
> -		ret = rte_hash_add_key(tbl_rw_test_param.h,
> +		ret[i - offset] = rte_hash_add_key(tbl_rw_test_param.h,
>  				     tbl_rw_test_param.keys + i);
> -		if (ret < 0)
> +		if (ret[i - offset] < 0)
> +			break;
> +
> +		/* lookup a random key */
> +		uint32_t rand = rte_rand() % (i + 1 - offset);
> +
> +		if (rte_hash_lookup(tbl_rw_test_param.h,
> +				tbl_rw_test_param.keys + rand) != ret[rand])
> +			break;
> +
> +
> +		if (rte_hash_del_key(tbl_rw_test_param.h,
> +				tbl_rw_test_param.keys + rand) != ret[rand])
> +			break;
> +
> +		ret[rand] = rte_hash_add_key(tbl_rw_test_param.h,
> +					tbl_rw_test_param.keys + rand);
> +		if (ret[rand] < 0)
>  			break;
> 
>  		if (rte_hash_lookup(tbl_rw_test_param.h,
> -				tbl_rw_test_param.keys + i) != ret)
> +			tbl_rw_test_param.keys + rand) != ret[rand])
>  			break;
>  	}
> 
> @@ -100,7 +121,7 @@ test_hash_readwrite_worker(__attribute__((unused))
> void *arg)  }
> 
>  static int
> -init_params(int use_htm, int use_jhash)
> +init_params(int use_ext, int use_htm, int use_jhash)
>  {
>  	unsigned int i;
> 
> @@ -129,6 +150,13 @@ init_params(int use_htm, int use_jhash)
>  			RTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY |
>  			RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD;
> 
> +	if (use_ext)
> +		hash_params.extra_flag |=
> +			RTE_HASH_EXTRA_FLAGS_EXT_TABLE;
> +	else
> +		hash_params.extra_flag &=
> +		       ~RTE_HASH_EXTRA_FLAGS_EXT_TABLE;
> +
>  	hash_params.name = "tests";
> 
>  	handle = rte_hash_create(&hash_params); @@ -167,7 +195,7 @@
> init_params(int use_htm, int use_jhash)  }
> 
>  static int
> -test_hash_readwrite_functional(int use_htm)
> +test_hash_readwrite_functional(int use_ext, int use_htm)
>  {
>  	unsigned int i;
>  	const void *next_key;
> @@ -178,6 +206,7 @@ test_hash_readwrite_functional(int use_htm)
>  	uint32_t lost_keys = 0;
>  	int use_jhash = 1;
>  	int slave_cnt = rte_lcore_count() - 1;
> +	uint32_t tot_insert = 0;
> 
>  	rte_atomic64_init(&gcycles);
>  	rte_atomic64_clear(&gcycles);
> @@ -185,11 +214,16 @@ test_hash_readwrite_functional(int use_htm)
>  	rte_atomic64_init(&ginsertions);
>  	rte_atomic64_clear(&ginsertions);
> 
> -	if (init_params(use_htm, use_jhash) != 0)
> +	if (init_params(use_ext, use_htm, use_jhash) != 0)
>  		goto err;
> 
> +	if (use_ext)
> +		tot_insert = TOTAL_INSERT_EXT;
> +	else
> +		tot_insert = TOTAL_INSERT;
> +
>  	tbl_rw_test_param.num_insert =
> -		TOTAL_INSERT / slave_cnt;
> +		tot_insert / slave_cnt;
> 
>  	tbl_rw_test_param.rounded_tot_insert =
>  		tbl_rw_test_param.num_insert
> @@ -345,7 +379,7 @@ test_hash_readwrite_perf(struct perf *perf_results,
> int use_htm,
>  	rte_atomic64_init(&gwrite_cycles);
>  	rte_atomic64_clear(&gwrite_cycles);
> 
> -	if (init_params(use_htm, use_jhash) != 0)
> +	if (init_params(0, use_htm, use_jhash) != 0)
>  		goto err;
> 
>  	/*
> @@ -579,7 +613,7 @@ test_hash_readwrite_main(void)
>  	 * than writer threads. This is to timing either reader threads or
>  	 * writer threads for performance numbers.
>  	 */
> -	int use_htm, reader_faster;
> +	int use_htm, use_ext,  reader_faster;
>  	unsigned int i = 0, core_id = 0;
> 
>  	if (rte_lcore_count() <= 2) {
> @@ -602,7 +636,13 @@ test_hash_readwrite_main(void)
>  		printf("Test read-write with Hardware transactional
> memory\n");
> 
>  		use_htm = 1;
> -		if (test_hash_readwrite_functional(use_htm) < 0)
> +		use_ext = 0;
> +
> +		if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
> +			return -1;
> +
> +		use_ext = 1;
> +		if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
>  			return -1;
> 
>  		reader_faster = 1;
> @@ -621,8 +661,14 @@ test_hash_readwrite_main(void)
> 
>  	printf("Test read-write without Hardware transactional memory\n");
>  	use_htm = 0;
> -	if (test_hash_readwrite_functional(use_htm) < 0)
> +	use_ext = 0;
> +	if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
>  		return -1;
> +
> +	use_ext = 1;
> +	if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
> +		return -1;
> +
>  	reader_faster = 1;
>  	if (test_hash_readwrite_perf(&non_htm_results, use_htm,
>  							reader_faster) < 0)
> --
> 2.7.4
diff mbox series

Patch

diff --git a/test/test/test_hash_readwrite.c b/test/test/test_hash_readwrite.c
index a8fadd0..13c28e0 100644
--- a/test/test/test_hash_readwrite.c
+++ b/test/test/test_hash_readwrite.c
@@ -21,6 +21,8 @@ 
 #define TOTAL_ENTRY (16*1024*1024)
 #define TOTAL_INSERT (15*1024*1024)
 
+#define TOTAL_INSERT_EXT (16*1024*1024)
+
 #define NUM_TEST 3
 unsigned int core_cnt[NUM_TEST] = {2, 4, 8};
 
@@ -59,8 +61,10 @@  test_hash_readwrite_worker(__attribute__((unused)) void *arg)
 	uint64_t i, offset;
 	uint32_t lcore_id = rte_lcore_id();
 	uint64_t begin, cycles;
-	int ret;
+	int *ret;
 
+	ret = rte_malloc(NULL, sizeof(int) *
+				tbl_rw_test_param.num_insert, 0);
 	for (i = 0; i < rte_lcore_count(); i++) {
 		if (slave_core_ids[i] == lcore_id)
 			break;
@@ -79,13 +83,30 @@  test_hash_readwrite_worker(__attribute__((unused)) void *arg)
 				tbl_rw_test_param.keys + i) > 0)
 			break;
 
-		ret = rte_hash_add_key(tbl_rw_test_param.h,
+		ret[i - offset] = rte_hash_add_key(tbl_rw_test_param.h,
 				     tbl_rw_test_param.keys + i);
-		if (ret < 0)
+		if (ret[i - offset] < 0)
+			break;
+
+		/* lookup a random key */
+		uint32_t rand = rte_rand() % (i + 1 - offset);
+
+		if (rte_hash_lookup(tbl_rw_test_param.h,
+				tbl_rw_test_param.keys + rand) != ret[rand])
+			break;
+
+
+		if (rte_hash_del_key(tbl_rw_test_param.h,
+				tbl_rw_test_param.keys + rand) != ret[rand])
+			break;
+
+		ret[rand] = rte_hash_add_key(tbl_rw_test_param.h,
+					tbl_rw_test_param.keys + rand);
+		if (ret[rand] < 0)
 			break;
 
 		if (rte_hash_lookup(tbl_rw_test_param.h,
-				tbl_rw_test_param.keys + i) != ret)
+			tbl_rw_test_param.keys + rand) != ret[rand])
 			break;
 	}
 
@@ -100,7 +121,7 @@  test_hash_readwrite_worker(__attribute__((unused)) void *arg)
 }
 
 static int
-init_params(int use_htm, int use_jhash)
+init_params(int use_ext, int use_htm, int use_jhash)
 {
 	unsigned int i;
 
@@ -129,6 +150,13 @@  init_params(int use_htm, int use_jhash)
 			RTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY |
 			RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD;
 
+	if (use_ext)
+		hash_params.extra_flag |=
+			RTE_HASH_EXTRA_FLAGS_EXT_TABLE;
+	else
+		hash_params.extra_flag &=
+		       ~RTE_HASH_EXTRA_FLAGS_EXT_TABLE;
+
 	hash_params.name = "tests";
 
 	handle = rte_hash_create(&hash_params);
@@ -167,7 +195,7 @@  init_params(int use_htm, int use_jhash)
 }
 
 static int
-test_hash_readwrite_functional(int use_htm)
+test_hash_readwrite_functional(int use_ext, int use_htm)
 {
 	unsigned int i;
 	const void *next_key;
@@ -178,6 +206,7 @@  test_hash_readwrite_functional(int use_htm)
 	uint32_t lost_keys = 0;
 	int use_jhash = 1;
 	int slave_cnt = rte_lcore_count() - 1;
+	uint32_t tot_insert = 0;
 
 	rte_atomic64_init(&gcycles);
 	rte_atomic64_clear(&gcycles);
@@ -185,11 +214,16 @@  test_hash_readwrite_functional(int use_htm)
 	rte_atomic64_init(&ginsertions);
 	rte_atomic64_clear(&ginsertions);
 
-	if (init_params(use_htm, use_jhash) != 0)
+	if (init_params(use_ext, use_htm, use_jhash) != 0)
 		goto err;
 
+	if (use_ext)
+		tot_insert = TOTAL_INSERT_EXT;
+	else
+		tot_insert = TOTAL_INSERT;
+
 	tbl_rw_test_param.num_insert =
-		TOTAL_INSERT / slave_cnt;
+		tot_insert / slave_cnt;
 
 	tbl_rw_test_param.rounded_tot_insert =
 		tbl_rw_test_param.num_insert
@@ -345,7 +379,7 @@  test_hash_readwrite_perf(struct perf *perf_results, int use_htm,
 	rte_atomic64_init(&gwrite_cycles);
 	rte_atomic64_clear(&gwrite_cycles);
 
-	if (init_params(use_htm, use_jhash) != 0)
+	if (init_params(0, use_htm, use_jhash) != 0)
 		goto err;
 
 	/*
@@ -579,7 +613,7 @@  test_hash_readwrite_main(void)
 	 * than writer threads. This is to timing either reader threads or
 	 * writer threads for performance numbers.
 	 */
-	int use_htm, reader_faster;
+	int use_htm, use_ext,  reader_faster;
 	unsigned int i = 0, core_id = 0;
 
 	if (rte_lcore_count() <= 2) {
@@ -602,7 +636,13 @@  test_hash_readwrite_main(void)
 		printf("Test read-write with Hardware transactional memory\n");
 
 		use_htm = 1;
-		if (test_hash_readwrite_functional(use_htm) < 0)
+		use_ext = 0;
+
+		if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
+			return -1;
+
+		use_ext = 1;
+		if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
 			return -1;
 
 		reader_faster = 1;
@@ -621,8 +661,14 @@  test_hash_readwrite_main(void)
 
 	printf("Test read-write without Hardware transactional memory\n");
 	use_htm = 0;
-	if (test_hash_readwrite_functional(use_htm) < 0)
+	use_ext = 0;
+	if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
 		return -1;
+
+	use_ext = 1;
+	if (test_hash_readwrite_functional(use_ext, use_htm) < 0)
+		return -1;
+
 	reader_faster = 1;
 	if (test_hash_readwrite_perf(&non_htm_results, use_htm,
 							reader_faster) < 0)