net/mlx5: fix transmit descriptor with VLAN insertions

Message ID 1567514105-24264-1-git-send-email-viacheslavo@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix transmit descriptor with VLAN insertions |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-dpdk_compile_ovs success Compile Testing PASS
ci/iol-dpdk_compile success Compile Testing PASS
ci/iol-dpdk_compile_spdk success Compile Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Performance success Performance Testing PASS
ci/mellanox-Performance success Performance Testing PASS

Commit Message

Slava Ovsiienko Sept. 3, 2019, 12:35 p.m. UTC
  If VLAN tag insertion transmit offload is engaged
(DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set)
the transmit descriptor may be built with wrong format, due to
packet length is not adjusted. Also, the ring buffer wrapup
is not handled correctly.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
 drivers/net/mlx5/mlx5_rxtx.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
  

Comments

Matan Azrad Sept. 3, 2019, 1:05 p.m. UTC | #1
Hi Slava

From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> If VLAN tag insertion transmit offload is engaged
> (DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set) the
> transmit descriptor may be built with wrong format, due to packet length is
> not adjusted. Also, the ring buffer wrapup is not handled correctly.
> 
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_rxtx.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
> index 8ec90c3..f540977 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.c
> +++ b/drivers/net/mlx5/mlx5_rxtx.c
> @@ -2861,13 +2861,14 @@ enum mlx5_txcmp_code {
>  	memcpy(pdst, buf, MLX5_DSEG_MIN_INLINE_SIZE);
>  	buf += MLX5_DSEG_MIN_INLINE_SIZE;
>  	pdst += MLX5_DSEG_MIN_INLINE_SIZE;
> +	len -= MLX5_DSEG_MIN_INLINE_SIZE;
>  	/* Insert VLAN ethertype + VLAN tag. Pointer is aligned. */
>  	assert(pdst == RTE_PTR_ALIGN(pdst, MLX5_WSEG_SIZE));
> +	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))

Why unlikely?
Wraparound is expected even in good cases, no?



> +		pdst = (uint8_t *)txq->wqes;
>  	*(uint32_t *)pdst = rte_cpu_to_be_32((RTE_ETHER_TYPE_VLAN <<
> 16) |
>  					      loc->mbuf->vlan_tci);
>  	pdst += sizeof(struct rte_vlan_hdr);
> -	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
> -		pdst = (uint8_t *)txq->wqes;
>  	/*
>  	 * The WQEBB space availability is checked by caller.
>  	 * Here we should be aware of WQE ring buffer wraparound only.
> --
> 1.8.3.1
  
Slava Ovsiienko Sept. 3, 2019, 1:43 p.m. UTC | #2
Hi, Matan

Please, see below.

> -----Original Message-----
> From: Matan Azrad <matan@mellanox.com>
> Sent: Tuesday, September 3, 2019 16:05
> To: Slava Ovsiienko <viacheslavo@mellanox.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: RE: [PATCH] net/mlx5: fix transmit descriptor with VLAN insertions
> 
> Hi Slava
> 
> From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> > If VLAN tag insertion transmit offload is engaged
> > (DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set) the
> > transmit descriptor may be built with wrong format, due to packet
> > length is not adjusted. Also, the ring buffer wrapup is not handled correctly.
> >
> > Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> > ---
> >  drivers/net/mlx5/mlx5_rxtx.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/mlx5/mlx5_rxtx.c
> > b/drivers/net/mlx5/mlx5_rxtx.c index 8ec90c3..f540977 100644
> > --- a/drivers/net/mlx5/mlx5_rxtx.c
> > +++ b/drivers/net/mlx5/mlx5_rxtx.c
> > @@ -2861,13 +2861,14 @@ enum mlx5_txcmp_code {
> >  	memcpy(pdst, buf, MLX5_DSEG_MIN_INLINE_SIZE);
> >  	buf += MLX5_DSEG_MIN_INLINE_SIZE;
> >  	pdst += MLX5_DSEG_MIN_INLINE_SIZE;
> > +	len -= MLX5_DSEG_MIN_INLINE_SIZE;
> >  	/* Insert VLAN ethertype + VLAN tag. Pointer is aligned. */
> >  	assert(pdst == RTE_PTR_ALIGN(pdst, MLX5_WSEG_SIZE));
> > +	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
> 
> Why unlikely?
> Wraparound is expected even in good cases, no?

It is good case but supposed to be rare. Wraparound happens once on entire ring buffer fill.
At this codepoint it ever has the less chance to happen - many of wraparounds happen on
data copying (the code below in this function).

With best regards,
Slava


> 
> 
> 
> > +		pdst = (uint8_t *)txq->wqes;
> >  	*(uint32_t *)pdst = rte_cpu_to_be_32((RTE_ETHER_TYPE_VLAN <<
> > 16) |
> >  					      loc->mbuf->vlan_tci);
> >  	pdst += sizeof(struct rte_vlan_hdr);
> > -	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
> > -		pdst = (uint8_t *)txq->wqes;
> >  	/*
> >  	 * The WQEBB space availability is checked by caller.
> >  	 * Here we should be aware of WQE ring buffer wraparound only.
> > --
> > 1.8.3.1
  
Matan Azrad Sept. 4, 2019, 6:17 a.m. UTC | #3
Hi

From: Slava Ovsiienko <viacheslavo@mellanox.com>
> Hi, Matan
> 
> Please, see below.
> 
> > -----Original Message-----
> > From: Matan Azrad <matan@mellanox.com>
> > Sent: Tuesday, September 3, 2019 16:05
> > To: Slava Ovsiienko <viacheslavo@mellanox.com>; dev@dpdk.org
> > Cc: stable@dpdk.org
> > Subject: RE: [PATCH] net/mlx5: fix transmit descriptor with VLAN
> > insertions
> >
> > Hi Slava
> >
> > From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> > > If VLAN tag insertion transmit offload is engaged
> > > (DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set) the
> > > transmit descriptor may be built with wrong format, due to packet
> > > length is not adjusted. Also, the ring buffer wrapup is not handled
> correctly.
> > >
> > > Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> > > Cc: stable@dpdk.org
> > >
> > > Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> > > ---
> > >  drivers/net/mlx5/mlx5_rxtx.c | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/net/mlx5/mlx5_rxtx.c
> > > b/drivers/net/mlx5/mlx5_rxtx.c index 8ec90c3..f540977 100644
> > > --- a/drivers/net/mlx5/mlx5_rxtx.c
> > > +++ b/drivers/net/mlx5/mlx5_rxtx.c
> > > @@ -2861,13 +2861,14 @@ enum mlx5_txcmp_code {
> > >  	memcpy(pdst, buf, MLX5_DSEG_MIN_INLINE_SIZE);
> > >  	buf += MLX5_DSEG_MIN_INLINE_SIZE;
> > >  	pdst += MLX5_DSEG_MIN_INLINE_SIZE;
> > > +	len -= MLX5_DSEG_MIN_INLINE_SIZE;
> > >  	/* Insert VLAN ethertype + VLAN tag. Pointer is aligned. */
> > >  	assert(pdst == RTE_PTR_ALIGN(pdst, MLX5_WSEG_SIZE));
> > > +	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
> >
> > Why unlikely?
> > Wraparound is expected even in good cases, no?
> 
> It is good case but supposed to be rare. Wraparound happens once on entire
> ring buffer fill.

1/ring size - event - it is part of the good flow.
I think it is better to let the branch prediction to do the work in this case and in all other places when good flow may happen for both true or false.


> At this codepoint it ever has the less chance to happen - many of
> wraparounds happen on data copying (the code below in this function).
> 
> With best regards,
> Slava
> 
> 
> >
> >
> >
> > > +		pdst = (uint8_t *)txq->wqes;
> > >  	*(uint32_t *)pdst = rte_cpu_to_be_32((RTE_ETHER_TYPE_VLAN <<
> > > 16) |
> > >  					      loc->mbuf->vlan_tci);
> > >  	pdst += sizeof(struct rte_vlan_hdr);
> > > -	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
> > > -		pdst = (uint8_t *)txq->wqes;
> > >  	/*
> > >  	 * The WQEBB space availability is checked by caller.
> > >  	 * Here we should be aware of WQE ring buffer wraparound only.
> > > --
> > > 1.8.3.1
  
Matan Azrad Sept. 10, 2019, 7:35 a.m. UTC | #4
From: Viacheslav Ovsiienko
> If VLAN tag insertion transmit offload is engaged
> (DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set) the
> transmit descriptor may be built with wrong format, due to packet length is
> not adjusted. Also, the ring buffer wrapup is not handled correctly.
> 
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
  
Raslan Darawsheh Sept. 10, 2019, 12:08 p.m. UTC | #5
Hi,
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Viacheslav Ovsiienko
> Sent: Tuesday, September 3, 2019 3:35 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@mellanox.com>; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix transmit descriptor with VLAN
> insertions
> 
> If VLAN tag insertion transmit offload is engaged
> (DEV_TX_OFFLOAD_VLAN_INSERT in tx queue configuration is set) the
> transmit descriptor may be built with wrong format, due to packet length is
> not adjusted. Also, the ring buffer wrapup is not handled correctly.
> 
> Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>


Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 8ec90c3..f540977 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -2861,13 +2861,14 @@  enum mlx5_txcmp_code {
 	memcpy(pdst, buf, MLX5_DSEG_MIN_INLINE_SIZE);
 	buf += MLX5_DSEG_MIN_INLINE_SIZE;
 	pdst += MLX5_DSEG_MIN_INLINE_SIZE;
+	len -= MLX5_DSEG_MIN_INLINE_SIZE;
 	/* Insert VLAN ethertype + VLAN tag. Pointer is aligned. */
 	assert(pdst == RTE_PTR_ALIGN(pdst, MLX5_WSEG_SIZE));
+	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
+		pdst = (uint8_t *)txq->wqes;
 	*(uint32_t *)pdst = rte_cpu_to_be_32((RTE_ETHER_TYPE_VLAN << 16) |
 					      loc->mbuf->vlan_tci);
 	pdst += sizeof(struct rte_vlan_hdr);
-	if (unlikely(pdst >= (uint8_t *)txq->wqes_end))
-		pdst = (uint8_t *)txq->wqes;
 	/*
 	 * The WQEBB space availability is checked by caller.
 	 * Here we should be aware of WQE ring buffer wraparound only.