diff mbox series

net/mlx5: fix metadata for compressed Rx CQEs

Message ID 1585052118-29013-1-git-send-email-viacheslavo@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix metadata for compressed Rx CQEs |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/Intel-compilation success Compilation OK

Commit Message

Slava Ovsiienko March 24, 2020, 12:15 p.m. UTC 
  If packets with the same metadata are received with compressed CQE
the metadata value is not copied from the title packet in vectorized
rx_burst routines, it causes wrong metadat values seeing by
applications.

Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
 drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 13 +++++++++++++
 drivers/net/mlx5/mlx5_rxtx_vec_neon.h    | 13 +++++++++++++
 drivers/net/mlx5/mlx5_rxtx_vec_sse.h     | 14 +++++++++++++-
 3 files changed, 39 insertions(+), 1 deletion(-)

Comments

Matan Azrad March 24, 2020, 3:57 p.m. UTC | #1 
From: Viacheslav Ovsiienko
> If packets with the same metadata are received with compressed CQE the
> metadata value is not copied from the title packet in vectorized rx_burst
> routines, it causes wrong metadat values seeing by applications.
> 
> Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Raslan Darawsheh March 25, 2020, 3:37 p.m. UTC | #2 
Hi,

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Viacheslav Ovsiienko
> Sent: Tuesday, March 24, 2020 2:15 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@mellanox.com>; stable@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix metadata for compressed Rx CQEs
> 
> If packets with the same metadata are received with compressed CQE
> the metadata value is not copied from the title packet in vectorized
> rx_burst routines, it causes wrong metadat values seeing by
> applications.
> 
> Fixes: a18ac6113331 ("net/mlx5: add metadata support to Rx datapath")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
> ---
>  drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 13 +++++++++++++
>  drivers/net/mlx5/mlx5_rxtx_vec_neon.h    | 13 +++++++++++++
>  drivers/net/mlx5/mlx5_rxtx_vec_sse.h     | 14 +++++++++++++-
>  3 files changed, 39 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> index aa43cab..ae5c857 100644
> --- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
> @@ -263,6 +263,19 @@
>  			elts[pos + 2]->hash.fdir.hi = flow_tag;
>  			elts[pos + 3]->hash.fdir.hi = flow_tag;
>  		}
> +		if (rte_flow_dynf_metadata_avail()) {
> +			const uint32_t meta =
> *RTE_FLOW_DYNF_METADATA(t_pkt);
> +
> +			/* Check if title packet has valid metadata. */
> +			if (meta) {
> +				MLX5_ASSERT(t_pkt->ol_flags &
> +					    PKT_RX_DYNF_METADATA);
> +				*RTE_FLOW_DYNF_METADATA(elts[pos]) =
> meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 1])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 2])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 3])
> = meta;
> +			}
> +		}
> 
>  		pos += MLX5_VPMD_DESCS_PER_LOOP;
>  		/* Move to next CQE and invalidate consumed CQEs. */
> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> index 6d952df..701e5e0 100644
> --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> @@ -205,6 +205,19 @@
>  			elts[pos + 2]->hash.fdir.hi = flow_tag;
>  			elts[pos + 3]->hash.fdir.hi = flow_tag;
>  		}
> +		if (rte_flow_dynf_metadata_avail()) {
> +			const uint32_t meta =
> *RTE_FLOW_DYNF_METADATA(t_pkt);
> +
> +			/* Check if title packet has valid metadata. */
> +			if (meta) {
> +				MLX5_ASSERT(t_pkt->ol_flags &
> +					    PKT_RX_DYNF_METADATA);
> +				*RTE_FLOW_DYNF_METADATA(elts[pos]) =
> meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 1])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 2])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 3])
> = meta;
> +			}
> +		}
>  		pos += MLX5_VPMD_DESCS_PER_LOOP;
>  		/* Move to next CQE and invalidate consumed CQEs. */
>  		if (!(pos & 0x7) && pos < mcqe_n) {
> diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
> b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
> index 406f23f..a4086df 100644
> --- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
> +++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
> @@ -118,7 +118,6 @@
>  			     14, 15,  6,  7,
>  			     10, 11,  2,  3);
>  #endif
> -
>  	/*
>  	 * A. load mCQEs into a 128bit register.
>  	 * B. store rearm data to mbuf.
> @@ -191,6 +190,19 @@
>  			elts[pos + 2]->hash.fdir.hi = flow_tag;
>  			elts[pos + 3]->hash.fdir.hi = flow_tag;
>  		}
> +		if (rte_flow_dynf_metadata_avail()) {
> +			const uint32_t meta =
> *RTE_FLOW_DYNF_METADATA(t_pkt);
> +
> +			/* Check if title packet has valid metadata. */
> +			if (meta) {
> +				MLX5_ASSERT(t_pkt->ol_flags &
> +					    PKT_RX_DYNF_METADATA);
> +				*RTE_FLOW_DYNF_METADATA(elts[pos]) =
> meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 1])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 2])
> = meta;
> +				*RTE_FLOW_DYNF_METADATA(elts[pos + 3])
> = meta;
> +			}
> +		}
>  		pos += MLX5_VPMD_DESCS_PER_LOOP;
>  		/* Move to next CQE and invalidate consumed CQEs. */
>  		if (!(pos & 0x7) && pos < mcqe_n) {
> --
> 1.8.3.1


Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
index aa43cab..ae5c857 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
@@ -263,6 +263,19 @@ 
 			elts[pos + 2]->hash.fdir.hi = flow_tag;
 			elts[pos + 3]->hash.fdir.hi = flow_tag;
 		}
+		if (rte_flow_dynf_metadata_avail()) {
+			const uint32_t meta = *RTE_FLOW_DYNF_METADATA(t_pkt);
+
+			/* Check if title packet has valid metadata. */
+			if (meta) {
+				MLX5_ASSERT(t_pkt->ol_flags &
+					    PKT_RX_DYNF_METADATA);
+				*RTE_FLOW_DYNF_METADATA(elts[pos]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 1]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 2]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 3]) = meta;
+			}
+		}
 
 		pos += MLX5_VPMD_DESCS_PER_LOOP;
 		/* Move to next CQE and invalidate consumed CQEs. */
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 6d952df..701e5e0 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -205,6 +205,19 @@ 
 			elts[pos + 2]->hash.fdir.hi = flow_tag;
 			elts[pos + 3]->hash.fdir.hi = flow_tag;
 		}
+		if (rte_flow_dynf_metadata_avail()) {
+			const uint32_t meta = *RTE_FLOW_DYNF_METADATA(t_pkt);
+
+			/* Check if title packet has valid metadata. */
+			if (meta) {
+				MLX5_ASSERT(t_pkt->ol_flags &
+					    PKT_RX_DYNF_METADATA);
+				*RTE_FLOW_DYNF_METADATA(elts[pos]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 1]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 2]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 3]) = meta;
+			}
+		}
 		pos += MLX5_VPMD_DESCS_PER_LOOP;
 		/* Move to next CQE and invalidate consumed CQEs. */
 		if (!(pos & 0x7) && pos < mcqe_n) {
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index 406f23f..a4086df 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -118,7 +118,6 @@ 
 			     14, 15,  6,  7,
 			     10, 11,  2,  3);
 #endif
-
 	/*
 	 * A. load mCQEs into a 128bit register.
 	 * B. store rearm data to mbuf.
@@ -191,6 +190,19 @@ 
 			elts[pos + 2]->hash.fdir.hi = flow_tag;
 			elts[pos + 3]->hash.fdir.hi = flow_tag;
 		}
+		if (rte_flow_dynf_metadata_avail()) {
+			const uint32_t meta = *RTE_FLOW_DYNF_METADATA(t_pkt);
+
+			/* Check if title packet has valid metadata. */
+			if (meta) {
+				MLX5_ASSERT(t_pkt->ol_flags &
+					    PKT_RX_DYNF_METADATA);
+				*RTE_FLOW_DYNF_METADATA(elts[pos]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 1]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 2]) = meta;
+				*RTE_FLOW_DYNF_METADATA(elts[pos + 3]) = meta;
+			}
+		}
 		pos += MLX5_VPMD_DESCS_PER_LOOP;
 		/* Move to next CQE and invalidate consumed CQEs. */
 		if (!(pos & 0x7) && pos < mcqe_n) {