net/mlx5: fix buffer split offload advertising
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Commit Message
The buffer split Rx offload is not compatible with Multi-Packet
Receiving Queue (MPRQ) Rx offload, hence, the buffer split
offload flag RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT and other related
values should be advertised only if there is no MPRQ engaged.
Fixes: 6c8f7f1c1877 ("net/mlx5: report Rx buffer split capabilities")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/mlx5_ethdev.c | 4 ++--
drivers/net/mlx5/mlx5_rxq.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
Comments
>-----Original Message-----
>From: dev <dev-bounces@dpdk.org> On Behalf Of Viacheslav Ovsiienko
>Sent: Friday, December 11, 2020 1:45 PM
>To: dev@dpdk.org
>Cc: Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad
><matan@nvidia.com>; stable@dpdk.org
>Subject: [dpdk-dev] [PATCH] net/mlx5: fix buffer split offload advertising
>
>The buffer split Rx offload is not compatible with Multi-Packet Receiving
>Queue (MPRQ) Rx offload, hence, the buffer split offload flag
>RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT and other related values should be
>advertised only if there is no MPRQ engaged.
>
>Fixes: 6c8f7f1c1877 ("net/mlx5: report Rx buffer split capabilities")
>Cc: stable@dpdk.org
>
>Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Asaf Penso <asafp@nvidia.com>
>---
> drivers/net/mlx5/mlx5_ethdev.c | 4 ++--
> drivers/net/mlx5/mlx5_rxq.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/net/mlx5/mlx5_ethdev.c
>b/drivers/net/mlx5/mlx5_ethdev.c index a3910cf..45ee7e4 100644
>--- a/drivers/net/mlx5/mlx5_ethdev.c
>+++ b/drivers/net/mlx5/mlx5_ethdev.c
>@@ -310,8 +310,8 @@
> info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
> info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
> info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
>- info->rx_seg_capa.multi_pools = 1;
>- info->rx_seg_capa.offset_allowed = 1;
>+ info->rx_seg_capa.multi_pools = !config->mprq.enabled;
>+ info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
> info->rx_seg_capa.offset_align_log2 = 0;
> info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
> info->rx_queue_offload_capa);
>diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index
>da7a8b3..a2613b0 100644
>--- a/drivers/net/mlx5/mlx5_rxq.c
>+++ b/drivers/net/mlx5/mlx5_rxq.c
>@@ -402,14 +402,14 @@
> struct mlx5_priv *priv = dev->data->dev_private;
> struct mlx5_dev_config *config = &priv->config;
> uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
>- RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT |
> DEV_RX_OFFLOAD_TIMESTAMP |
> DEV_RX_OFFLOAD_JUMBO_FRAME |
> DEV_RX_OFFLOAD_RSS_HASH);
>
>+ if (!config->mprq.enabled)
>+ offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
> if (config->hw_fcs_strip)
> offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
>-
> if (config->hw_csum)
> offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
> DEV_RX_OFFLOAD_UDP_CKSUM |
>--
>1.8.3.1
Hi,
> -----Original Message-----
> From: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Sent: Friday, December 11, 2020 1:45 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix buffer split offload advertising
>
> The buffer split Rx offload is not compatible with Multi-Packet
> Receiving Queue (MPRQ) Rx offload, hence, the buffer split
> offload flag RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT and other related
> values should be advertised only if there is no MPRQ engaged.
>
> Fixes: 6c8f7f1c1877 ("net/mlx5: report Rx buffer split capabilities")
> Cc: stable@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> ---
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
@@ -310,8 +310,8 @@
info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
- info->rx_seg_capa.multi_pools = 1;
- info->rx_seg_capa.offset_allowed = 1;
+ info->rx_seg_capa.multi_pools = !config->mprq.enabled;
+ info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
info->rx_seg_capa.offset_align_log2 = 0;
info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
info->rx_queue_offload_capa);
@@ -402,14 +402,14 @@
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_dev_config *config = &priv->config;
uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER |
- RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT |
DEV_RX_OFFLOAD_TIMESTAMP |
DEV_RX_OFFLOAD_JUMBO_FRAME |
DEV_RX_OFFLOAD_RSS_HASH);
+ if (!config->mprq.enabled)
+ offloads |= RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
if (config->hw_fcs_strip)
offloads |= DEV_RX_OFFLOAD_KEEP_CRC;
-
if (config->hw_csum)
offloads |= (DEV_RX_OFFLOAD_IPV4_CKSUM |
DEV_RX_OFFLOAD_UDP_CKSUM |