[v2] examples/timer: fix incorrect time interval

Message ID 1620293376-41815-1-git-send-email-humin29@huawei.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series [v2] examples/timer: fix incorrect time interval |

Checks

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ci/checkpatch success coding style OK
ci/iol-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
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ci/iol-mellanox-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS

Commit Message

humin (Q) May 6, 2021, 9:29 a.m. UTC
  From: Chengchang Tang <tangchengchang@huawei.com>

Timer sample example assumes that the frequency of the timer is about
2Ghz to control the period of calling rte_timer_manage(). But this
assumption is easy to fail. For example. the frequency of tsc on ARM64
is much less than 2Ghz.

This patch uses the frequency of the current timer to calculate the
correct time interval to ensure consistent result on all platforms.

In addition, the rte_rdtsc() is replaced with the more recommended
rte_get_timer_cycles function in this patch.

Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
v2:
* delete confusing comments.
---
 examples/timer/main.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)
  

Comments

Thomas Monjalon May 12, 2021, 2:40 p.m. UTC | #1
06/05/2021 11:29, Min Hu (Connor):
> From: Chengchang Tang <tangchengchang@huawei.com>
> 
> Timer sample example assumes that the frequency of the timer is about
> 2Ghz to control the period of calling rte_timer_manage(). But this
> assumption is easy to fail. For example. the frequency of tsc on ARM64
> is much less than 2Ghz.
> 
> This patch uses the frequency of the current timer to calculate the
> correct time interval to ensure consistent result on all platforms.
> 
> In addition, the rte_rdtsc() is replaced with the more recommended
> rte_get_timer_cycles function in this patch.
> 
> Fixes: af75078fece3 ("first public release")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>

Applied, thanks
  

Patch

diff --git a/examples/timer/main.c b/examples/timer/main.c
index d67301e..d270ce4 100644
--- a/examples/timer/main.c
+++ b/examples/timer/main.c
@@ -18,8 +18,7 @@ 
 #include <rte_timer.h>
 #include <rte_debug.h>
 
-#define TIMER_RESOLUTION_CYCLES 20000000ULL /* around 10ms at 2 Ghz */
-
+static uint64_t timer_resolution_cycles;
 static struct rte_timer timer0;
 static struct rte_timer timer1;
 
@@ -66,15 +65,14 @@  lcore_mainloop(__rte_unused void *arg)
 
 	while (1) {
 		/*
-		 * Call the timer handler on each core: as we don't
-		 * need a very precise timer, so only call
-		 * rte_timer_manage() every ~10ms (at 2Ghz). In a real
-		 * application, this will enhance performances as
-		 * reading the HPET timer is not efficient.
+		 * Call the timer handler on each core: as we don't need a
+		 * very precise timer, so only call rte_timer_manage()
+		 * every ~10ms. In a real application, this will enhance
+		 * performances as reading the HPET timer is not efficient.
 		 */
-		cur_tsc = rte_rdtsc();
+		cur_tsc = rte_get_timer_cycles();
 		diff_tsc = cur_tsc - prev_tsc;
-		if (diff_tsc > TIMER_RESOLUTION_CYCLES) {
+		if (diff_tsc > timer_resolution_cycles) {
 			rte_timer_manage();
 			prev_tsc = cur_tsc;
 		}
@@ -100,8 +98,10 @@  main(int argc, char **argv)
 	rte_timer_init(&timer0);
 	rte_timer_init(&timer1);
 
-	/* load timer0, every second, on main lcore, reloaded automatically */
 	hz = rte_get_timer_hz();
+	timer_resolution_cycles = hz * 10 / 1000; /* around 10ms */
+
+	/* load timer0, every second, on main lcore, reloaded automatically */
 	lcore_id = rte_lcore_id();
 	rte_timer_reset(&timer0, hz, PERIODICAL, lcore_id, timer0_cb, NULL);