diff mbox series

[v3] build: fix SVE compile error with gcc8.3

Message ID 1621562002-10961-1-git-send-email-fengchengwen@huawei.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v3] build: fix SVE compile error with gcc8.3 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/iol-abi-testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/github-robot success github build: passed
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance fail Performance Testing issues
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Functional fail Functional Testing issues

Commit Message

Chengwen Feng May 21, 2021, 1:53 a.m. UTC 
  If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler are gcc8.3, it will compile error:
	In file included from ../dpdk-next-net/lib/eal/common/
	eal_common_options.c:38:
	../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
	error: arm_sve.h: No such file or directory
	#include <arm_sve.h>
	       ^~~~~~~~~~~
	compilation terminated.

The root cause is that gcc8.3 supports SVE (the macro
__ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].

The solution:
a) Detect compiler whether support SVE ACLE, if support then define
CC_SVE_ACLE_SUPPORT macro.
b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.

[1] ACLE:  Arm C Language Extensions, the SVE ACLE header file is
<arm_sve.h>, user should include it when writing ACLE SVE code.

Fixes: 67b68824a82d ("lpm/arm: support SVE")

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
v3:
* double-indent 'cc.check_header('arm_sve.h')' line
* move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
  of compile_time_cpuflags setting)
* fix minor syntax error in commit log
v2:
* modify title start with 'build'

---
 config/arm/meson.build         | 5 +++++
 lib/eal/arm/include/rte_vect.h | 2 +-
 lib/lpm/rte_lpm.h              | 2 +-
 3 files changed, 7 insertions(+), 2 deletions(-)

Comments

Ruifeng Wang May 25, 2021, 6:02 a.m. UTC | #1 
> -----Original Message-----
> From: Chengwen Feng <fengchengwen@huawei.com>
> Sent: Friday, May 21, 2021 9:53 AM
> To: thomas@monjalon.net; ferruh.yigit@intel.com; Ruifeng Wang
> <Ruifeng.Wang@arm.com>
> Cc: dev@dpdk.org; bruce.richardson@intel.com;
> vladimir.medvedkin@intel.com; viktorin@rehivetech.com;
> jerinj@marvell.com
> Subject: [PATCH v3] build: fix SVE compile error with gcc8.3
> 
> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the
> compiler are gcc8.3, it will compile error:
> 	In file included from ../dpdk-next-net/lib/eal/common/
> 	eal_common_options.c:38:
> 	../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
> 	error: arm_sve.h: No such file or directory
> 	#include <arm_sve.h>
> 	       ^~~~~~~~~~~
> 	compilation terminated.
> 
> The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE
> was 1), but it doesn't support SVE ACLE [1].
> 
> The solution:
> a) Detect compiler whether support SVE ACLE, if support then define
> CC_SVE_ACLE_SUPPORT macro.
> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
> 
> [1] ACLE:  Arm C Language Extensions, the SVE ACLE header file is
> <arm_sve.h>, user should include it when writing ACLE SVE code.
> 
> Fixes: 67b68824a82d ("lpm/arm: support SVE")
> 
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> ---
> v3:
> * double-indent 'cc.check_header('arm_sve.h')' line
> * move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
>   of compile_time_cpuflags setting)
> * fix minor syntax error in commit log
> v2:
> * modify title start with 'build'
> 
> ---
>  config/arm/meson.build         | 5 +++++
>  lib/eal/arm/include/rte_vect.h | 2 +-
>  lib/lpm/rte_lpm.h              | 2 +-
>  3 files changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e..08299b0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args:
> machine_args) != ''
>      compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
>      'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']  endif
> +
> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
> +        cc.check_header('arm_sve.h'))
> +    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1) endif
> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
> index 093e912..277b656 100644
> --- a/lib/eal/arm/include/rte_vect.h
> +++ b/lib/eal/arm/include/rte_vect.h
> @@ -9,7 +9,7 @@
>  #include "generic/rte_vect.h"
>  #include "rte_debug.h"
>  #include "arm_neon.h"
> -#ifdef __ARM_FEATURE_SVE
> +#ifdef CC_SVE_ACLE_SUPPORT
>  #include <arm_sve.h>
>  #endif
> 
> diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..9262814
> 100644
> --- a/lib/lpm/rte_lpm.h
> +++ b/lib/lpm/rte_lpm.h
> @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t
> ip, uint32_t hop[4],
>  	uint32_t defv);
> 
>  #if defined(RTE_ARCH_ARM)
> -#ifdef __ARM_FEATURE_SVE
> +#ifdef CC_SVE_ACLE_SUPPORT
>  #include "rte_lpm_sve.h"
>  #else
>  #include "rte_lpm_neon.h"
> --
> 2.8.1

Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Chengwen Feng May 27, 2021, 7:12 a.m. UTC | #2 
Hi, Thomas

    Could you review this patch? Thanks


From:Ruifeng Wang <Ruifeng.Wang@arm.com>
To:Fengchengwen <fengchengwen@huawei.com>;Thomas Monjalon <thomas@monjalon.net>;ferruh.yigit <ferruh.yigit@intel.com>
Cc:dev <dev@dpdk.org>;Richardson, Bruce <bruce.richardson@intel.com>;vladimir.medvedkin <vladimir.medvedkin@intel.com>;viktorin <viktorin@rehivetech.com>;Jerin Jacob <jerinj@marvell.com>;nd <nd@arm.com>
Date:2021-05-25 14:02:20
Subject:RE: [PATCH v3] build: fix SVE compile error with gcc8.3

> -----Original Message-----
> From: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
> Sent: Friday, May 21, 2021 9:53 AM
> To: thomas@monjalon.net<mailto:thomas@monjalon.net>; ferruh.yigit@intel.com<mailto:ferruh.yigit@intel.com>; Ruifeng Wang
> < Ruifeng.Wang@arm.com<mailto:Ruifeng.Wang@arm.com>>
> Cc: dev@dpdk.org<mailto:dev@dpdk.org>; bruce.richardson@intel.com<mailto:bruce.richardson@intel.com>;
> vladimir.medvedkin@intel.com<mailto:vladimir.medvedkin@intel.com>; viktorin@rehivetech.com<mailto:viktorin@rehivetech.com>;
> jerinj@marvell.com<mailto:jerinj@marvell.com>
> Subject: [PATCH v3] build: fix SVE compile error with gcc8.3
>
> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the
> compiler are gcc8.3, it will compile error:
>        In file included from ../dpdk-next-net/lib/eal/common/
>        eal_common_options.c:38:
>        ../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
>        error: arm_sve.h: No such file or directory
>        #include <arm_sve.h>
>               ^~~~~~~~~~~
>        compilation terminated.
>
> The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE
> was 1), but it doesn't support SVE ACLE [1].
>
> The solution:
> a) Detect compiler whether support SVE ACLE, if support then define
> CC_SVE_ACLE_SUPPORT macro.
> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
>
> [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
> <arm_sve.h>, user should include it when writing ACLE SVE code.
>
> Fixes: 67b68824a82d ("lpm/arm: support SVE")
>
> Signed-off-by: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
> ---
> v3:
> * double-indent 'cc.check_header('arm_sve.h')' line
> * move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
>   of compile_time_cpuflags setting)
> * fix minor syntax error in commit log
> v2:
> * modify title start with 'build'
>
> ---
> config/arm/meson.build         | 5 +++++
> lib/eal/arm/include/rte_vect.h | 2 +-
> lib/lpm/rte_lpm.h              | 2 +-
> 3 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> e83a56e..08299b0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args:
> machine_args) != ''
>      compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
>      'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] endif
> +
> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
> +        cc.check_header('arm_sve.h'))
> +    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1) endif
> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
> index 093e912..277b656 100644
> --- a/lib/eal/arm/include/rte_vect.h
> +++ b/lib/eal/arm/include/rte_vect.h
> @@ -9,7 +9,7 @@
> #include "generic/rte_vect.h"
> #include "rte_debug.h"
> #include "arm_neon.h"
> -#ifdef __ARM_FEATURE_SVE
> +#ifdef CC_SVE_ACLE_SUPPORT
> #include <arm_sve.h>
> #endif
>
> diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..9262814
> 100644
> --- a/lib/lpm/rte_lpm.h
> +++ b/lib/lpm/rte_lpm.h
> @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t
> ip, uint32_t hop[4],
>        uint32_t defv);
>
> #if defined(RTE_ARCH_ARM)
> -#ifdef __ARM_FEATURE_SVE
> +#ifdef CC_SVE_ACLE_SUPPORT
> #include "rte_lpm_sve.h"
> #else
> #include "rte_lpm_neon.h"
> --
> 2.8.1

Acked-by: Ruifeng Wang < ruifeng.wang@arm.com<mailto:ruifeng.wang@arm.com>>
Chengwen Feng June 12, 2021, 7:07 a.m. UTC | #3 
Friendly ping


On 2021/5/27 15:12, Fengchengwen wrote:
> Hi, Thomas
> 
>     Could you review this patch? Thanks
> 
> 
> From:Ruifeng Wang <Ruifeng.Wang@arm.com>
> To:Fengchengwen <fengchengwen@huawei.com>;Thomas Monjalon <thomas@monjalon.net>;ferruh.yigit <ferruh.yigit@intel.com>
> Cc:dev <dev@dpdk.org>;Richardson, Bruce <bruce.richardson@intel.com>;vladimir.medvedkin <vladimir.medvedkin@intel.com>;viktorin <viktorin@rehivetech.com>;Jerin Jacob <jerinj@marvell.com>;nd <nd@arm.com>
> Date:2021-05-25 14:02:20
> Subject:RE: [PATCH v3] build: fix SVE compile error with gcc8.3
> 
>> -----Original Message-----
>> From: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
>> Sent: Friday, May 21, 2021 9:53 AM
>> To: thomas@monjalon.net<mailto:thomas@monjalon.net>; ferruh.yigit@intel.com<mailto:ferruh.yigit@intel.com>; Ruifeng Wang
>> < Ruifeng.Wang@arm.com<mailto:Ruifeng.Wang@arm.com>>
>> Cc: dev@dpdk.org<mailto:dev@dpdk.org>; bruce.richardson@intel.com<mailto:bruce.richardson@intel.com>;
>> vladimir.medvedkin@intel.com<mailto:vladimir.medvedkin@intel.com>; viktorin@rehivetech.com<mailto:viktorin@rehivetech.com>;
>> jerinj@marvell.com<mailto:jerinj@marvell.com>
>> Subject: [PATCH v3] build: fix SVE compile error with gcc8.3
>>
>> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the
>> compiler are gcc8.3, it will compile error:
>>        In file included from ../dpdk-next-net/lib/eal/common/
>>        eal_common_options.c:38:
>>        ../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
>>        error: arm_sve.h: No such file or directory
>>        #include <arm_sve.h>
>>               ^~~~~~~~~~~
>>        compilation terminated.
>>
>> The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE
>> was 1), but it doesn't support SVE ACLE [1].
>>
>> The solution:
>> a) Detect compiler whether support SVE ACLE, if support then define
>> CC_SVE_ACLE_SUPPORT macro.
>> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
>>
>> [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
>> <arm_sve.h>, user should include it when writing ACLE SVE code.
>>
>> Fixes: 67b68824a82d ("lpm/arm: support SVE")
>>
>> Signed-off-by: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
>> ---
>> v3:
>> * double-indent 'cc.check_header('arm_sve.h')' line
>> * move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
>>   of compile_time_cpuflags setting)
>> * fix minor syntax error in commit log
>> v2:
>> * modify title start with 'build'
>>
>> ---
>> config/arm/meson.build         | 5 +++++
>> lib/eal/arm/include/rte_vect.h | 2 +-
>> lib/lpm/rte_lpm.h              | 2 +-
>> 3 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/config/arm/meson.build b/config/arm/meson.build index
>> e83a56e..08299b0 100644
>> --- a/config/arm/meson.build
>> +++ b/config/arm/meson.build
>> @@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args:
>> machine_args) != ''
>>      compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
>>      'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] endif
>> +
>> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
>> +        cc.check_header('arm_sve.h'))
>> +    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1) endif
>> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
>> index 093e912..277b656 100644
>> --- a/lib/eal/arm/include/rte_vect.h
>> +++ b/lib/eal/arm/include/rte_vect.h
>> @@ -9,7 +9,7 @@
>> #include "generic/rte_vect.h"
>> #include "rte_debug.h"
>> #include "arm_neon.h"
>> -#ifdef __ARM_FEATURE_SVE
>> +#ifdef CC_SVE_ACLE_SUPPORT
>> #include <arm_sve.h>
>> #endif
>>
>> diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..9262814
>> 100644
>> --- a/lib/lpm/rte_lpm.h
>> +++ b/lib/lpm/rte_lpm.h
>> @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t
>> ip, uint32_t hop[4],
>>        uint32_t defv);
>>
>> #if defined(RTE_ARCH_ARM)
>> -#ifdef __ARM_FEATURE_SVE
>> +#ifdef CC_SVE_ACLE_SUPPORT
>> #include "rte_lpm_sve.h"
>> #else
>> #include "rte_lpm_neon.h"
>> --
>> 2.8.1
> 
> Acked-by: Ruifeng Wang < ruifeng.wang@arm.com<mailto:ruifeng.wang@arm.com>>
>
Chengwen Feng June 21, 2021, 12:56 a.m. UTC | #4 
Hi, Thomas

This patch already reviewed by ARM guys.

Please review it, thanks


On 2021/6/12 15:07, fengchengwen wrote:
> Friendly ping
> 
> 
> On 2021/5/27 15:12, Fengchengwen wrote:
>> Hi, Thomas
>>
>>     Could you review this patch? Thanks
>>
>>
>> From:Ruifeng Wang <Ruifeng.Wang@arm.com>
>> To:Fengchengwen <fengchengwen@huawei.com>;Thomas Monjalon <thomas@monjalon.net>;ferruh.yigit <ferruh.yigit@intel.com>
>> Cc:dev <dev@dpdk.org>;Richardson, Bruce <bruce.richardson@intel.com>;vladimir.medvedkin <vladimir.medvedkin@intel.com>;viktorin <viktorin@rehivetech.com>;Jerin Jacob <jerinj@marvell.com>;nd <nd@arm.com>
>> Date:2021-05-25 14:02:20
>> Subject:RE: [PATCH v3] build: fix SVE compile error with gcc8.3
>>
>>> -----Original Message-----
>>> From: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
>>> Sent: Friday, May 21, 2021 9:53 AM
>>> To: thomas@monjalon.net<mailto:thomas@monjalon.net>; ferruh.yigit@intel.com<mailto:ferruh.yigit@intel.com>; Ruifeng Wang
>>> < Ruifeng.Wang@arm.com<mailto:Ruifeng.Wang@arm.com>>
>>> Cc: dev@dpdk.org<mailto:dev@dpdk.org>; bruce.richardson@intel.com<mailto:bruce.richardson@intel.com>;
>>> vladimir.medvedkin@intel.com<mailto:vladimir.medvedkin@intel.com>; viktorin@rehivetech.com<mailto:viktorin@rehivetech.com>;
>>> jerinj@marvell.com<mailto:jerinj@marvell.com>
>>> Subject: [PATCH v3] build: fix SVE compile error with gcc8.3
>>>
>>> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'), and the
>>> compiler are gcc8.3, it will compile error:
>>>        In file included from ../dpdk-next-net/lib/eal/common/
>>>        eal_common_options.c:38:
>>>        ../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
>>>        error: arm_sve.h: No such file or directory
>>>        #include <arm_sve.h>
>>>               ^~~~~~~~~~~
>>>        compilation terminated.
>>>
>>> The root cause is that gcc8.3 supports SVE (the macro __ARM_FEATURE_SVE
>>> was 1), but it doesn't support SVE ACLE [1].
>>>
>>> The solution:
>>> a) Detect compiler whether support SVE ACLE, if support then define
>>> CC_SVE_ACLE_SUPPORT macro.
>>> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
>>>
>>> [1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
>>> <arm_sve.h>, user should include it when writing ACLE SVE code.
>>>
>>> Fixes: 67b68824a82d ("lpm/arm: support SVE")
>>>
>>> Signed-off-by: Chengwen Feng < fengchengwen@huawei.com<mailto:fengchengwen@huawei.com>>
>>> ---
>>> v3:
>>> * double-indent 'cc.check_header('arm_sve.h')' line
>>> * move set 'CC_SVE_ACLE_SUPPORT' logic to the back (not in the middle
>>>   of compile_time_cpuflags setting)
>>> * fix minor syntax error in commit log
>>> v2:
>>> * modify title start with 'build'
>>>
>>> ---
>>> config/arm/meson.build         | 5 +++++
>>> lib/eal/arm/include/rte_vect.h | 2 +-
>>> lib/lpm/rte_lpm.h              | 2 +-
>>> 3 files changed, 7 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/config/arm/meson.build b/config/arm/meson.build index
>>> e83a56e..08299b0 100644
>>> --- a/config/arm/meson.build
>>> +++ b/config/arm/meson.build
>>> @@ -488,3 +488,8 @@ if cc.get_define('__ARM_FEATURE_CRYPTO', args:
>>> machine_args) != ''
>>>      compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
>>>      'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2'] endif
>>> +
>>> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
>>> +        cc.check_header('arm_sve.h'))
>>> +    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1) endif
>>> diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
>>> index 093e912..277b656 100644
>>> --- a/lib/eal/arm/include/rte_vect.h
>>> +++ b/lib/eal/arm/include/rte_vect.h
>>> @@ -9,7 +9,7 @@
>>> #include "generic/rte_vect.h"
>>> #include "rte_debug.h"
>>> #include "arm_neon.h"
>>> -#ifdef __ARM_FEATURE_SVE
>>> +#ifdef CC_SVE_ACLE_SUPPORT
>>> #include <arm_sve.h>
>>> #endif
>>>
>>> diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h index 28b5768..9262814
>>> 100644
>>> --- a/lib/lpm/rte_lpm.h
>>> +++ b/lib/lpm/rte_lpm.h
>>> @@ -402,7 +402,7 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t
>>> ip, uint32_t hop[4],
>>>        uint32_t defv);
>>>
>>> #if defined(RTE_ARCH_ARM)
>>> -#ifdef __ARM_FEATURE_SVE
>>> +#ifdef CC_SVE_ACLE_SUPPORT
>>> #include "rte_lpm_sve.h"
>>> #else
>>> #include "rte_lpm_neon.h"
>>> --
>>> 2.8.1
>>
>> Acked-by: Ruifeng Wang < ruifeng.wang@arm.com<mailto:ruifeng.wang@arm.com>>
>>
Thomas Monjalon June 23, 2021, 8:05 a.m. UTC | #5 
21/05/2021 03:53, Chengwen Feng:
> If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
> and the compiler are gcc8.3, it will compile error:
> 	In file included from ../dpdk-next-net/lib/eal/common/
> 	eal_common_options.c:38:
> 	../dpdk-next-net/lib/eal/arm/include/rte_vect.h:13:10: fatal
> 	error: arm_sve.h: No such file or directory
> 	#include <arm_sve.h>
> 	       ^~~~~~~~~~~
> 	compilation terminated.
> 
> The root cause is that gcc8.3 supports SVE (the macro
> __ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].
> 
> The solution:
> a) Detect compiler whether support SVE ACLE, if support then define
> CC_SVE_ACLE_SUPPORT macro.
> b) Use the CC_SVE_ACLE_SUPPORT macro to include SVE header file.
> 
> [1] ACLE:  Arm C Language Extensions, the SVE ACLE header file is
> <arm_sve.h>, user should include it when writing ACLE SVE code.
> 
> Fixes: 67b68824a82d ("lpm/arm: support SVE")
> 
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> ---
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
> +        cc.check_header('arm_sve.h'))
> +    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1)

Any defined flag should start with RTE_.
I suggest RTE_HAS_SVE_ACLE.

Please add a comment before defining this flag to explain what it is.
diff mbox series

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index e83a56e..08299b0 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -488,3 +488,8 @@  if cc.get_define('__ARM_FEATURE_CRYPTO', args: machine_args) != ''
     compile_time_cpuflags += ['RTE_CPUFLAG_AES', 'RTE_CPUFLAG_PMULL',
     'RTE_CPUFLAG_SHA1', 'RTE_CPUFLAG_SHA2']
 endif
+
+if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and
+        cc.check_header('arm_sve.h'))
+    dpdk_conf.set('CC_SVE_ACLE_SUPPORT', 1)
+endif
diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h
index 093e912..277b656 100644
--- a/lib/eal/arm/include/rte_vect.h
+++ b/lib/eal/arm/include/rte_vect.h
@@ -9,7 +9,7 @@ 
 #include "generic/rte_vect.h"
 #include "rte_debug.h"
 #include "arm_neon.h"
-#ifdef __ARM_FEATURE_SVE
+#ifdef CC_SVE_ACLE_SUPPORT
 #include <arm_sve.h>
 #endif
 
diff --git a/lib/lpm/rte_lpm.h b/lib/lpm/rte_lpm.h
index 28b5768..9262814 100644
--- a/lib/lpm/rte_lpm.h
+++ b/lib/lpm/rte_lpm.h
@@ -402,7 +402,7 @@  rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
 	uint32_t defv);
 
 #if defined(RTE_ARCH_ARM)
-#ifdef __ARM_FEATURE_SVE
+#ifdef CC_SVE_ACLE_SUPPORT
 #include "rte_lpm_sve.h"
 #else
 #include "rte_lpm_neon.h"