diff mbox series

[01/25] common/cnxk: define minor opcodes for MISC opcode

Message ID 1638859858-734-2-git-send-email-anoobj@marvell.com (mailing list archive)
State Superseded
Delegated to: akhil goyal
Headers show
Series New features and improvements in cnxk crypto PMD | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph Dec. 7, 2021, 6:50 a.m. UTC
MISC CPT instruction behaves differently based on minor opcode.
Define the missing minor opcodes for MISC major opcode.

Signed-off-by: Aakash Sasidharan <asasidharan@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
---
 drivers/common/cnxk/roc_se.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h
index 5be832f..253575a 100644
--- a/drivers/common/cnxk/roc_se.h
+++ b/drivers/common/cnxk/roc_se.h
@@ -15,7 +15,11 @@ 
 #define ROC_SE_MAJOR_OP_HMAC	   0x35
 #define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
 #define ROC_SE_MAJOR_OP_KASUMI	   0x38
-#define ROC_SE_MAJOR_OP_MISC	   0x01
+
+#define ROC_SE_MAJOR_OP_MISC		 0x01
+#define ROC_SE_MISC_MINOR_OP_PASSTHROUGH 0x03
+#define ROC_SE_MISC_MINOR_OP_DUMMY	 0x04
+#define ROC_SE_MISC_MINOR_OP_HW_SUPPORT	 0x08
 
 #define ROC_SE_MAX_AAD_SIZE 64
 #define ROC_SE_MAX_MAC_LEN  64