diff mbox series

[03/25] common/cnxk: add bit fields for params

Message ID 1638859858-734-4-git-send-email-anoobj@marvell.com (mailing list archive)
State Superseded
Delegated to: akhil goyal
Headers show
Series New features and improvements in cnxk crypto PMD | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph Dec. 7, 2021, 6:50 a.m. UTC
From: Archana Muniganti <marchana@marvell.com>

Added new structure with bit fields for params.


Signed-off-by: Archana Muniganti <marchana@marvell.com>
---
 drivers/common/cnxk/roc_ie_on.h  | 30 +++++++++++++++++++++++++++++-
 drivers/crypto/cnxk/cn9k_ipsec.c | 16 +++++++++++++---
 2 files changed, 42 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h
index 53591c6..817ef33 100644
--- a/drivers/common/cnxk/roc_ie_on.h
+++ b/drivers/common/cnxk/roc_ie_on.h
@@ -21,7 +21,6 @@  enum roc_ie_on_ucc_ipsec {
 };
 
 /* Helper macros */
-#define ROC_IE_ON_PER_PKT_IV   BIT(11)
 #define ROC_IE_ON_INB_RPTR_HDR 0x8
 
 enum {
@@ -102,6 +101,35 @@  struct roc_ie_on_ip_template {
 	};
 };
 
+union roc_on_ipsec_outb_param1 {
+	uint16_t u16;
+	struct {
+		uint16_t frag_num : 4;
+		uint16_t rsvd_4_6 : 3;
+		uint16_t gre_select : 1;
+		uint16_t dsiv : 1;
+		uint16_t ikev2 : 1;
+		uint16_t min_frag_size : 1;
+		uint16_t per_pkt_iv : 1;
+		uint16_t tfc_pad_enable : 1;
+		uint16_t tfc_dummy_pkt : 1;
+		uint16_t rfc_or_override_mode : 1;
+		uint16_t custom_hdr_or_p99 : 1;
+	} s;
+};
+
+union roc_on_ipsec_inb_param2 {
+	uint16_t u16;
+	struct {
+		uint16_t rsvd_0_10 : 11;
+		uint16_t gre_select : 1;
+		uint16_t ikev2 : 1;
+		uint16_t udp_cksum : 1;
+		uint16_t ctx_addr_sel : 1;
+		uint16_t custom_hdr_or_p99 : 1;
+	} s;
+};
+
 struct roc_ie_on_sa_ctl {
 	uint64_t spi : 32;
 	uint64_t exp_proto_inter_frag : 8;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index a81130b..6455ef9 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -280,6 +280,7 @@  cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
 	struct rte_crypto_sym_xform *auth_xform = crypto_xform->next;
 	struct roc_ie_on_ip_template *template = NULL;
 	struct roc_cpt *roc_cpt = qp->lf.roc_cpt;
+	union roc_on_ipsec_outb_param1 param1;
 	struct cnxk_cpt_inst_tmpl *inst_tmpl;
 	struct roc_ie_on_outb_sa *out_sa;
 	struct cn9k_sec_session *sess;
@@ -407,8 +408,12 @@  cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,
 	w4.u64 = 0;
 	w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC;
 	w4.s.opcode_minor = ctx_len >> 3;
-	w4.s.param1 = BIT(9);
-	w4.s.param1 |= ROC_IE_ON_PER_PKT_IV;
+
+	param1.u16 = 0;
+	param1.s.ikev2 = 1;
+	param1.s.per_pkt_iv = 1;
+	w4.s.param1 = param1.u16;
+
 	inst_tmpl->w4 = w4.u64;
 
 	w7.u64 = 0;
@@ -428,6 +433,7 @@  cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 {
 	struct rte_crypto_sym_xform *auth_xform = crypto_xform;
 	struct roc_cpt *roc_cpt = qp->lf.roc_cpt;
+	union roc_on_ipsec_inb_param2 param2;
 	struct cnxk_cpt_inst_tmpl *inst_tmpl;
 	struct roc_ie_on_inb_sa *in_sa;
 	struct cn9k_sec_session *sess;
@@ -478,7 +484,11 @@  cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,
 	w4.u64 = 0;
 	w4.s.opcode_major = ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC;
 	w4.s.opcode_minor = ctx_len >> 3;
-	w4.s.param2 = BIT(12);
+
+	param2.u16 = 0;
+	param2.s.ikev2 = 1;
+	w4.s.param2 = param2.u16;
+
 	inst_tmpl->w4 = w4.u64;
 
 	w7.u64 = 0;