From patchwork Wed Apr 27 18:17:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 110381 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51C51A0093; Wed, 27 Apr 2022 20:22:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A2948427FC; Wed, 27 Apr 2022 20:22:34 +0200 (CEST) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 13A704113F for ; Wed, 27 Apr 2022 20:22:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651083753; x=1682619753; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=LiUUfjfBEjmiFNG7aHPYc8MZWfkGQqixkA+NjixpYEo=; b=UCrpkOo5X4RT41qKXQn9AeYOh/5Zq+34FbbgyeAl0fydxuoWjiiDkpeQ 4sMn9b/bfTJXSapMefkVlQG4SSkYltgWjysevrmGSJsbOYcvDelLjNmGr y1WxkCaD0Gih2fkqKdCPZIgI5xwzVO619ul3VEFqIHR7lPnOJd1H9eu8d eqVcTiW+TXL6numXDD7r21nGxIrh1Ag3GLhA9mH4W/1bwK0drrJebED9P RBScQ8MMStwp3YUTjTKF9aDov4rjce8gt5gAAX/OTkufjHURVybhYcVfW +F+2yqQpUM77slC9SRayQIEBHrKt9rxXd+UlmQr/R15eMofpqdjl+CaW4 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10330"; a="246587331" X-IronPort-AV: E=Sophos;i="5.90,293,1643702400"; d="scan'208";a="246587331" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2022 11:22:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,293,1643702400"; d="scan'208";a="730937301" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga005.jf.intel.com with ESMTP; 27 Apr 2022 11:22:28 -0700 From: Nicolas Chautru To: dev@dpdk.org, gakhil@marvell.com Cc: trix@redhat.com, thomas@monjalon.net, ray.kinsella@intel.com, bruce.richardson@intel.com, hemant.agrawal@nxp.com, mingshan.zhang@intel.com, david.marchand@redhat.com, Nicolas Chautru Subject: [PATCH v2 2/5] baseband/acc100: modify validation code for ACC101 Date: Wed, 27 Apr 2022 11:17:00 -0700 Message-Id: <1651083423-33202-3-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1651083423-33202-1-git-send-email-nicolas.chautru@intel.com> References: <1651083423-33202-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The validation requirement is different for the two devices. Signed-off-by: Nicolas Chautru --- drivers/baseband/acc100/rte_acc100_pmd.c | 40 ++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 12 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index fca27ef..daf2ce0 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1293,6 +1293,14 @@ return (q->d->device_variant == ACC100_VARIANT); } +#ifdef RTE_LIBRTE_BBDEV_DEBUG +static inline bool +validate_op_required(struct acc100_queue *q) +{ + return is_acc100(q); +} +#endif + /* Fill in a frame control word for LDPC decoding. */ static inline void acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, @@ -2187,8 +2195,10 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validates turbo encoder parameters */ static inline int -validate_enc_op(struct rte_bbdev_enc_op *op) +validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_turbo_enc *turbo_enc = &op->turbo_enc; struct rte_bbdev_op_enc_turbo_cb_params *cb = NULL; struct rte_bbdev_op_enc_turbo_tb_params *tb = NULL; @@ -2325,8 +2335,10 @@ static inline uint32_t hq_index(uint32_t offset) } /* Validates LDPC encoder parameters */ static inline int -validate_ldpc_enc_op(struct rte_bbdev_enc_op *op) +validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_ldpc_enc *ldpc_enc = &op->ldpc_enc; if (op->mempool == NULL) { @@ -2378,8 +2390,10 @@ static inline uint32_t hq_index(uint32_t offset) /* Validates LDPC decoder parameters */ static inline int -validate_ldpc_dec_op(struct rte_bbdev_dec_op *op) +validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_ldpc_dec *ldpc_dec = &op->ldpc_dec; if (op->mempool == NULL) { @@ -2434,7 +2448,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_enc_op(op) == -1) { + if (validate_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo encoder validation failed"); return -EINVAL; } @@ -2488,7 +2502,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_enc_op(ops[0]) == -1) { + if (validate_ldpc_enc_op(ops[0], q) == -1) { rte_bbdev_log(ERR, "LDPC encoder validation failed"); return -EINVAL; } @@ -2550,7 +2564,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_enc_op(op) == -1) { + if (validate_ldpc_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC encoder validation failed"); return -EINVAL; } @@ -2607,7 +2621,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_enc_op(op) == -1) { + if (validate_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo encoder validation failed"); return -EINVAL; } @@ -2680,8 +2694,10 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validates turbo decoder parameters */ static inline int -validate_dec_op(struct rte_bbdev_dec_op *op) +validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_turbo_dec *turbo_dec = &op->turbo_dec; struct rte_bbdev_op_dec_turbo_cb_params *cb = NULL; struct rte_bbdev_op_dec_turbo_tb_params *tb = NULL; @@ -2827,7 +2843,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_dec_op(op) == -1) { + if (validate_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo decoder validation failed"); return -EINVAL; } @@ -3052,7 +3068,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_dec_op(op) == -1) { + if (validate_ldpc_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC decoder validation failed"); return -EINVAL; } @@ -3156,7 +3172,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_dec_op(op) == -1) { + if (validate_ldpc_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC decoder validation failed"); return -EINVAL; } @@ -3246,7 +3262,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_dec_op(op) == -1) { + if (validate_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo decoder validation failed"); return -EINVAL; }