diff mbox series

raw/ifpga: avoid potential integer overflow

Message ID 1655953900-26199-1-git-send-email-wei.huang@intel.com (mailing list archive)
State Accepted
Delegated to: Thomas Monjalon
Headers show
Series raw/ifpga: avoid potential integer overflow | expand

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ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
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ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Huang, Wei June 23, 2022, 3:11 a.m. UTC
Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga()
is evaluated using 32-bit arithmetic, which would overflow
 potentially. Change tx_chunks to type "uint64_t" to avoid such
issue.

Coverity issue: 379203
Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")

Signed-off-by: Wei Huang <wei.huang@intel.com>
---
 drivers/raw/ifpga/afu_pmd_n3000.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Zhang, Tianfei June 23, 2022, 5:52 a.m. UTC | #1
> -----Original Message-----
> From: Huang, Wei <wei.huang@intel.com>
> Sent: Thursday, June 23, 2022 11:12 AM
> To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com;
> hemant.agrawal@nxp.com
> Cc: stable@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Huang, Wei
> <wei.huang@intel.com>
> Subject: [PATCH] raw/ifpga: avoid potential integer overflow
> 
> Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga() is evaluated
> using 32-bit arithmetic, which would overflow  potentially. Change tx_chunks to
> type "uint64_t" to avoid such issue.
> 
> Coverity issue: 379203
> Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")
> 
> Signed-off-by: Wei Huang <wei.huang@intel.com>
> ---
>  drivers/raw/ifpga/afu_pmd_n3000.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
> b/drivers/raw/ifpga/afu_pmd_n3000.c
> index 8708164..5120df5 100644
> --- a/drivers/raw/ifpga/afu_pmd_n3000.c
> +++ b/drivers/raw/ifpga/afu_pmd_n3000.c
> @@ -1158,7 +1158,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx
> *ctx, uint64_t dst, uint64_t src,
>  	uint64_t count_left = count;
>  	uint64_t dma_chunks = 0;
>  	uint64_t offset = 0;
> -	uint32_t tx_chunks = 0;
> +	uint64_t tx_chunks = 0;
>  	uint64_t *tmp_buf = NULL;
>  	int ret = 0;
> 
> @@ -1213,7 +1213,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx
> *ctx, uint64_t dst, uint64_t src,
>  		offset = tx_chunks * ctx->dma_buf_size;
>  		count_left -= offset;
>  		IFPGA_RAWDEV_PMD_DEBUG("0x%"PRIx64" --> 0x%"PRIx64
> -			" (%u...0x%"PRIx64")",
> +			" (%"PRIu64"...0x%"PRIx64")",
>  			src, dst, tx_chunks, count_left);
>  		tmp_buf = (uint64_t *)rte_malloc(NULL, ctx->dma_buf_size,
>  			DMA_ALIGN_BYTES);
> --
> 1.8.3.1

It looks good for me.

Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>
Xu, Rosen June 23, 2022, 6:35 a.m. UTC | #2
Hi,

> -----Original Message-----
> From: Huang, Wei <wei.huang@intel.com>
> Sent: Thursday, June 23, 2022 11:12
> To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com;
> hemant.agrawal@nxp.com
> Cc: stable@dpdk.org; Xu, Rosen <rosen.xu@intel.com>; Zhang, Tianfei
> <tianfei.zhang@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Huang, Wei
> <wei.huang@intel.com>
> Subject: [PATCH] raw/ifpga: avoid potential integer overflow
> 
> Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga() is
> evaluated using 32-bit arithmetic, which would overflow  potentially. Change
> tx_chunks to type "uint64_t" to avoid such issue.
> 
> Coverity issue: 379203
> Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")
> 
> Signed-off-by: Wei Huang <wei.huang@intel.com>
> ---
>  drivers/raw/ifpga/afu_pmd_n3000.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c
> b/drivers/raw/ifpga/afu_pmd_n3000.c
> index 8708164..5120df5 100644
> --- a/drivers/raw/ifpga/afu_pmd_n3000.c
> +++ b/drivers/raw/ifpga/afu_pmd_n3000.c
> @@ -1158,7 +1158,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx
> *ctx, uint64_t dst, uint64_t src,
>  	uint64_t count_left = count;
>  	uint64_t dma_chunks = 0;
>  	uint64_t offset = 0;
> -	uint32_t tx_chunks = 0;
> +	uint64_t tx_chunks = 0;
>  	uint64_t *tmp_buf = NULL;
>  	int ret = 0;
> 
> @@ -1213,7 +1213,7 @@ static int dma_fpga_to_fpga(struct dma_afu_ctx
> *ctx, uint64_t dst, uint64_t src,
>  		offset = tx_chunks * ctx->dma_buf_size;
>  		count_left -= offset;
>  		IFPGA_RAWDEV_PMD_DEBUG("0x%"PRIx64" -->
> 0x%"PRIx64
> -			" (%u...0x%"PRIx64")",
> +			" (%"PRIu64"...0x%"PRIx64")",
>  			src, dst, tx_chunks, count_left);
>  		tmp_buf = (uint64_t *)rte_malloc(NULL, ctx->dma_buf_size,
>  			DMA_ALIGN_BYTES);
> --
> 1.8.3.1

Acked-by: Rosen Xu <rosen.xu@intel.com>
Thomas Monjalon June 26, 2022, 10:16 a.m. UTC | #3
> > Expression "tx_chunks * ctx->dma_buf_size" in dma_fpga_to_fpga() is evaluated
> > using 32-bit arithmetic, which would overflow  potentially. Change tx_chunks to
> > type "uint64_t" to avoid such issue.
> > 
> > Coverity issue: 379203
> > Fixes: 7d63899a5c19 ("raw/ifpga: add N3000 AFU driver")
> > 
> > Signed-off-by: Wei Huang <wei.huang@intel.com>
> 
> It looks good for me.
> 
> Acked-by: Tianfei Zhang <tianfei.zhang@intel.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/drivers/raw/ifpga/afu_pmd_n3000.c b/drivers/raw/ifpga/afu_pmd_n3000.c
index 8708164..5120df5 100644
--- a/drivers/raw/ifpga/afu_pmd_n3000.c
+++ b/drivers/raw/ifpga/afu_pmd_n3000.c
@@ -1158,7 +1158,7 @@  static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx, uint64_t dst, uint64_t src,
 	uint64_t count_left = count;
 	uint64_t dma_chunks = 0;
 	uint64_t offset = 0;
-	uint32_t tx_chunks = 0;
+	uint64_t tx_chunks = 0;
 	uint64_t *tmp_buf = NULL;
 	int ret = 0;
 
@@ -1213,7 +1213,7 @@  static int dma_fpga_to_fpga(struct dma_afu_ctx *ctx, uint64_t dst, uint64_t src,
 		offset = tx_chunks * ctx->dma_buf_size;
 		count_left -= offset;
 		IFPGA_RAWDEV_PMD_DEBUG("0x%"PRIx64" --> 0x%"PRIx64
-			" (%u...0x%"PRIx64")",
+			" (%"PRIu64"...0x%"PRIx64")",
 			src, dst, tx_chunks, count_left);
 		tmp_buf = (uint64_t *)rte_malloc(NULL, ctx->dma_buf_size,
 			DMA_ALIGN_BYTES);