RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Use
new rte_mbuf_rearm_data and rte_mbuf_rx_descriptor_fields1 accessors
that provide a compatible type pointer without using the marker fields.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
drivers/net/enic/enic_main.c | 4 +---
drivers/net/enic/enic_rxtx_vec_avx2.c | 18 +++++++++---------
2 files changed, 10 insertions(+), 12 deletions(-)
@@ -577,7 +577,6 @@ int enic_enable(struct enic *enic)
int err;
struct rte_eth_dev *eth_dev = enic->rte_dev;
uint64_t simple_tx_offloads;
- uintptr_t p;
if (enic->enable_avx2_rx) {
struct rte_mbuf mb_def = { .buf_addr = 0 };
@@ -592,8 +591,7 @@ int enic_enable(struct enic *enic)
mb_def.port = enic->port_id;
rte_mbuf_refcnt_set(&mb_def, 1);
rte_compiler_barrier();
- p = (uintptr_t)&mb_def.rearm_data;
- enic->mbuf_initializer = *(uint64_t *)p;
+ enic->mbuf_initializer = *rte_mbuf_rearm_data(&mb_def);
}
eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
@@ -19,7 +19,7 @@
{
bool tnl;
- *(uint64_t *)&mb->rearm_data = enic->mbuf_initializer;
+ *rte_mbuf_rearm_data(mb) = enic->mbuf_initializer;
mb->data_len = cqd->bytes_written_flags &
CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
mb->pkt_len = mb->data_len;
@@ -737,14 +737,14 @@
* vlan_tci - 26 (from cqd)
* rss - 28 (from cqd)
*/
- _mm256_storeu_si256((__m256i *)&rxmb[0]->rearm_data, rearm0);
- _mm256_storeu_si256((__m256i *)&rxmb[1]->rearm_data, rearm1);
- _mm256_storeu_si256((__m256i *)&rxmb[2]->rearm_data, rearm2);
- _mm256_storeu_si256((__m256i *)&rxmb[3]->rearm_data, rearm3);
- _mm256_storeu_si256((__m256i *)&rxmb[4]->rearm_data, rearm4);
- _mm256_storeu_si256((__m256i *)&rxmb[5]->rearm_data, rearm5);
- _mm256_storeu_si256((__m256i *)&rxmb[6]->rearm_data, rearm6);
- _mm256_storeu_si256((__m256i *)&rxmb[7]->rearm_data, rearm7);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[0]), rearm0);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[1]), rearm1);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[2]), rearm2);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[3]), rearm3);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[4]), rearm4);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[5]), rearm5);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[6]), rearm6);
+ _mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rxmb[7]), rearm7);
max_rx -= 8;
cqd += 8;