Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
drivers/common/qat/qat_adf/icp_qat_hw.h | 8 ++++----
drivers/common/qat/qat_common.h | 4 ++--
drivers/common/qat/qat_qp.h | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
@@ -391,10 +391,10 @@ enum icp_qat_hw_cipher_convert {
#define ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE 4
#define ICP_QAT_HW_CCM_NONCE_OFFSET 1
-struct icp_qat_hw_cipher_algo_blk {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk {
struct icp_qat_hw_cipher_config cipher_config;
uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
struct icp_qat_hw_gen2_crc_cd {
uint32_t flags;
@@ -423,10 +423,10 @@ struct icp_qat_hw_ucs_cipher_config {
uint32_t reserved[3];
};
-struct icp_qat_hw_cipher_algo_blk20 {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk20 {
struct icp_qat_hw_ucs_cipher_config cipher_config;
uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
enum icp_qat_hw_ucs_cipher_reflect_out {
ICP_QAT_HW_CIPHER_UCS_REFLECT_OUT_DISABLED = 0,
@@ -61,11 +61,11 @@ struct qat_flat_buf {
}
__extension__
-struct qat_sgl {
+struct __rte_cache_aligned qat_sgl {
qat_sgl_hdr;
/* flexible array of flat buffers*/
struct qat_flat_buf buffers[0];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
/** Common, i.e. not service-specific, statistics */
struct qat_common_stats {
@@ -81,7 +81,7 @@ typedef int (*qat_op_dequeue_t)(void **op, uint8_t *resp, void *op_cookie,
#define QAT_BUILD_REQUEST_MAX_OPAQUE_SIZE 2
-struct qat_qp {
+struct __rte_cache_aligned qat_qp {
void *mmap_bar_addr;
struct qat_queue tx_q;
struct qat_queue rx_q;
@@ -95,10 +95,10 @@ struct qat_qp {
struct qat_pci_device *qat_dev;
/**< qat device this qp is on */
uint32_t enqueued;
- uint32_t dequeued __rte_aligned(4);
+ alignas(sizeof(uint32_t)) uint32_t dequeued;
uint16_t max_inflights;
uint16_t min_enq_burst_threshold;
-} __rte_cache_aligned;
+};
/**
* Structure with data needed for creation of queue pair.