@@ -98,7 +98,7 @@
* This adds an extra local variable, but almost halves the
* number of PCIe writes.
*/
- val = __atomic_load_n(droq->pkts_sent_ism, __ATOMIC_RELAXED);
+ val = rte_atomic_load_explicit(droq->pkts_sent_ism, rte_memory_order_relaxed);
new_pkts = val - droq->pkts_sent_prev;
droq->pkts_sent_prev = val;
@@ -111,7 +111,8 @@
rte_mb();
rte_write64(OTX2_SDP_REQUEST_ISM, droq->pkts_sent_reg);
- while (__atomic_load_n(droq->pkts_sent_ism, __ATOMIC_RELAXED) >= val) {
+ while (rte_atomic_load_explicit(droq->pkts_sent_ism,
+ rte_memory_order_relaxed) >= val) {
rte_write64(OTX2_SDP_REQUEST_ISM, droq->pkts_sent_reg);
rte_mb();
}
@@ -15,7 +15,7 @@
* This adds an extra local variable, but almost halves the
* number of PCIe writes.
*/
- val = __atomic_load_n(iq->inst_cnt_ism, __ATOMIC_RELAXED);
+ val = rte_atomic_load_explicit(iq->inst_cnt_ism, rte_memory_order_relaxed);
iq->inst_cnt += val - iq->inst_cnt_prev;
iq->inst_cnt_prev = val;
@@ -27,7 +27,8 @@
rte_mb();
rte_write64(OTX2_SDP_REQUEST_ISM, iq->inst_cnt_reg);
- while (__atomic_load_n(iq->inst_cnt_ism, __ATOMIC_RELAXED) >= val) {
+ while (rte_atomic_load_explicit(iq->inst_cnt_ism,
+ rte_memory_order_relaxed) >= val) {
rte_write64(OTX2_SDP_REQUEST_ISM, iq->inst_cnt_reg);
rte_mb();
}
@@ -150,10 +150,10 @@
rte_write64(ism_addr, (uint8_t *)otx_ep->hw_addr +
CNXK_EP_R_IN_CNTS_ISM(iq_no));
iq->inst_cnt_ism =
- (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ CNXK_EP_IQ_ISM_OFFSET(iq_no));
otx_ep_err("SDP_R[%d] INST Q ISM virt: %p, dma: 0x%" PRIX64, iq_no,
- (void *)iq->inst_cnt_ism, ism_addr);
+ (void *)(uintptr_t)iq->inst_cnt_ism, ism_addr);
*iq->inst_cnt_ism = 0;
iq->inst_cnt_prev = 0;
iq->partial_ih = ((uint64_t)otx_ep->pkind) << 36;
@@ -235,10 +235,10 @@
rte_write64(ism_addr, (uint8_t *)otx_ep->hw_addr +
CNXK_EP_R_OUT_CNTS_ISM(oq_no));
droq->pkts_sent_ism =
- (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ CNXK_EP_OQ_ISM_OFFSET(oq_no));
otx_ep_err("SDP_R[%d] OQ ISM virt: %p dma: 0x%" PRIX64,
- oq_no, (void *)droq->pkts_sent_ism, ism_addr);
+ oq_no, (void *)(uintptr_t)droq->pkts_sent_ism, ism_addr);
*droq->pkts_sent_ism = 0;
droq->pkts_sent_prev = 0;
@@ -300,10 +300,10 @@ static int otx2_vf_enable_rxq_intr(struct otx_ep_device *otx_epvf,
oct_ep_write64(ism_addr, (uint8_t *)otx_ep->hw_addr +
SDP_VF_R_IN_CNTS_ISM(iq_no));
iq->inst_cnt_ism =
- (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ OTX2_EP_IQ_ISM_OFFSET(iq_no));
otx_ep_err("SDP_R[%d] INST Q ISM virt: %p, dma: 0x%x", iq_no,
- (void *)iq->inst_cnt_ism,
+ (void *)(uintptr_t)iq->inst_cnt_ism,
(unsigned int)ism_addr);
*iq->inst_cnt_ism = 0;
iq->inst_cnt_prev = 0;
@@ -386,10 +386,10 @@ static int otx2_vf_enable_rxq_intr(struct otx_ep_device *otx_epvf,
oct_ep_write64(ism_addr, (uint8_t *)otx_ep->hw_addr +
SDP_VF_R_OUT_CNTS_ISM(oq_no));
droq->pkts_sent_ism =
- (uint32_t *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ (uint32_t __rte_atomic *)((uint8_t *)otx_ep->ism_buffer_mz->addr
+ OTX2_EP_OQ_ISM_OFFSET(oq_no));
otx_ep_err("SDP_R[%d] OQ ISM virt: %p, dma: 0x%x", oq_no,
- (void *)droq->pkts_sent_ism,
+ (void *)(uintptr_t)droq->pkts_sent_ism,
(unsigned int)ism_addr);
*droq->pkts_sent_ism = 0;
droq->pkts_sent_prev = 0;
@@ -218,7 +218,7 @@ struct otx_ep_iq_config {
*/
struct otx_ep_instr_queue {
/* Location in memory updated by SDP ISM */
- uint32_t *inst_cnt_ism;
+ RTE_ATOMIC(uint32_t) *inst_cnt_ism;
struct rte_mbuf **mbuf_list;
/* Pointer to the Virtual Base addr of the input ring. */
uint8_t *base_addr;
@@ -413,7 +413,7 @@ struct otx_ep_droq {
uint8_t ism_ena;
/* Pointer to host memory copy of output packet count, set by ISM */
- uint32_t *pkts_sent_ism;
+ RTE_ATOMIC(uint32_t) *pkts_sent_ism;
uint32_t pkts_sent_prev;
/* Statistics for this DROQ. */
@@ -475,7 +475,8 @@
rte_mb();
rte_write64(OTX2_SDP_REQUEST_ISM, iq->inst_cnt_reg);
- while (__atomic_load_n(iq->inst_cnt_ism, __ATOMIC_RELAXED) >= val) {
+ while (rte_atomic_load_explicit(iq->inst_cnt_ism,
+ rte_memory_order_relaxed) >= val) {
rte_write64(OTX2_SDP_REQUEST_ISM, iq->inst_cnt_reg);
rte_mb();
}
@@ -871,7 +872,8 @@
rte_mb();
rte_write64(OTX2_SDP_REQUEST_ISM, droq->pkts_sent_reg);
- while (__atomic_load_n(droq->pkts_sent_ism, __ATOMIC_RELAXED) >= val) {
+ while (rte_atomic_load_explicit(droq->pkts_sent_ism,
+ rte_memory_order_relaxed) >= val) {
rte_write64(OTX2_SDP_REQUEST_ISM, droq->pkts_sent_reg);
rte_mb();
}