From patchwork Fri Dec 1 08:47:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao1, Wei" X-Patchwork-Id: 31859 X-Patchwork-Delegate: helin.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 379A83256; Fri, 1 Dec 2017 09:54:53 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 2EEE13255 for ; Fri, 1 Dec 2017 09:54:50 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Dec 2017 00:54:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.45,344,1508828400"; d="scan'208"; a="1250623178" Received: from dpdk2.bj.intel.com ([172.16.182.60]) by fmsmga002.fm.intel.com with ESMTP; 01 Dec 2017 00:54:48 -0800 From: Wei Zhao To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, beilei.xing@intel.com, Wei Zhao Date: Fri, 1 Dec 2017 16:47:06 +0800 Message-Id: <20171201084706.7741-1-wei.zhao1@intel.com> X-Mailer: git-send-email 2.9.3 Subject: [dpdk-dev] [PATCH] net/i40e: add fdir nvgre parameters check X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add mask parameters check in nvgre parser for flow API. Fixes: 30965ca341278 ("net/i40e: add NVGRE flow parsing") Signed-off-by: Wei Zhao --- drivers/net/i40e/i40e_flow.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c index 7e4936e..05e54f1 100644 --- a/drivers/net/i40e/i40e_flow.c +++ b/drivers/net/i40e/i40e_flow.c @@ -3610,6 +3610,41 @@ i40e_flow_parse_nvgre_pattern(__rte_unused struct rte_eth_dev *dev, "Invalid TNI mask"); return -rte_errno; } + if (nvgre_mask->protocol && + nvgre_mask->protocol != 0xFFFF) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Invalid NVGRE item"); + return -rte_errno; + } + if (nvgre_mask->c_k_s_rsvd0_ver && + nvgre_mask->c_k_s_rsvd0_ver != + rte_cpu_to_be_16(0x3000)) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Invalid NVGRE item"); + return -rte_errno; + } + if (nvgre_spec->c_k_s_rsvd0_ver != + rte_cpu_to_be_16(0x2000) && + nvgre_mask->c_k_s_rsvd0_ver) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Invalid NVGRE item"); + return -rte_errno; + } + if (nvgre_mask->protocol && + nvgre_spec->protocol != + rte_cpu_to_be_16(0x6558)) { + rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ITEM, + item, + "Invalid NVGRE item"); + return -rte_errno; + } rte_memcpy(((uint8_t *)&tenant_id_be + 1), nvgre_spec->tni, 3); filter->tenant_id =