From patchwork Sun Dec 3 06:08:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 31894 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3FDCF1AEF4; Sun, 3 Dec 2017 07:36:56 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id A1BA4199C8 for ; Sun, 3 Dec 2017 07:36:53 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 3 Dec 2017 08:36:48 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (dev-r630-06.mtbc.labs.mlnx [10.12.205.180]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id vB36ahDt020465; Sun, 3 Dec 2017 08:36:48 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id vB368bJQ075139; Sun, 3 Dec 2017 14:08:37 +0800 Received: (from xuemingl@localhost) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id vB368bWa075138; Sun, 3 Dec 2017 14:08:37 +0800 From: Xueming Li To: Nelio Laranjeiro , Adrien Mazarguil , Thomas Monjalon Cc: Xueming Li , dev@dpdk.org Date: Sun, 3 Dec 2017 14:08:10 +0800 Message-Id: <20171203060812.74932-4-xuemingl@mellanox.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20171203060812.74932-1-xuemingl@mellanox.com> References: <20171203060812.74932-1-xuemingl@mellanox.com> In-Reply-To: <20171129173106.120828-2-xuemingl@mellanox.com> References: <20171129173106.120828-2-xuemingl@mellanox.com> Subject: [dpdk-dev] [RFC v1 3/5] ethdev: support GRE and L3VXLAN tunnel type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Xueming Li --- lib/librte_ether/rte_eth_ctrl.h | 4 +++- lib/librte_ether/rte_ethdev.h | 2 ++ lib/librte_ether/rte_flow.c | 1 + lib/librte_ether/rte_flow.h | 7 +++++++ 4 files changed, 13 insertions(+), 1 deletion(-) diff --git a/lib/librte_ether/rte_eth_ctrl.h b/lib/librte_ether/rte_eth_ctrl.h index 838690424..ce111ade2 100644 --- a/lib/librte_ether/rte_eth_ctrl.h +++ b/lib/librte_ether/rte_eth_ctrl.h @@ -83,7 +83,9 @@ extern "C" { #define RTE_ETH_FLOW_VXLAN 19 /**< VXLAN protocol based flow */ #define RTE_ETH_FLOW_GENEVE 20 /**< GENEVE protocol based flow */ #define RTE_ETH_FLOW_NVGRE 21 /**< NVGRE protocol based flow */ -#define RTE_ETH_FLOW_MAX 22 +#define RTE_ETH_FLOW_L3VXLAN 22 /**< L3-VXLAN protocol based flow */ +#define RTE_ETH_FLOW_GRE 23 /**< GRE protocol based flow */ +#define RTE_ETH_FLOW_MAX 24 /** * Feature filter types diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 341c2d624..baacc7093 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -453,6 +453,8 @@ struct rte_eth_rss_conf { #define ETH_RSS_VXLAN (1ULL << RTE_ETH_FLOW_VXLAN) #define ETH_RSS_GENEVE (1ULL << RTE_ETH_FLOW_GENEVE) #define ETH_RSS_NVGRE (1ULL << RTE_ETH_FLOW_NVGRE) +#define ETH_RSS_L3VXLAN (1ULL << RTE_ETH_FLOW_L3VXLAN) +#define ETH_RSS_GRE (1ULL << RTE_ETH_FLOW_GRE) #define ETH_RSS_IP ( \ ETH_RSS_IPV4 | \ diff --git a/lib/librte_ether/rte_flow.c b/lib/librte_ether/rte_flow.c index 665906303..44d839110 100644 --- a/lib/librte_ether/rte_flow.c +++ b/lib/librte_ether/rte_flow.c @@ -81,6 +81,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = { MK_FLOW_ITEM(GRE, sizeof(struct rte_flow_item_gre)), MK_FLOW_ITEM(E_TAG, sizeof(struct rte_flow_item_e_tag)), MK_FLOW_ITEM(NVGRE, sizeof(struct rte_flow_item_nvgre)), + MK_FLOW_ITEM(L3VXLAN, sizeof(struct rte_flow_item_vxlan)), }; /** Generate flow_action[] entry. */ diff --git a/lib/librte_ether/rte_flow.h b/lib/librte_ether/rte_flow.h index 41ab91912..7f240bf35 100644 --- a/lib/librte_ether/rte_flow.h +++ b/lib/librte_ether/rte_flow.h @@ -300,6 +300,13 @@ enum rte_flow_item_type { RTE_FLOW_ITEM_TYPE_GRE, /** + * Matches a L3-VXLAN header. + * + * See struct rte_flow_item_vxlan. + */ + RTE_FLOW_ITEM_TYPE_L3VXLAN, + + /** * [META] * * Fuzzy pattern match, expect faster than default.