From patchwork Fri Mar 9 11:29:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 35852 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6C594AAC6; Fri, 9 Mar 2018 12:30:08 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id 01342AAB9 for ; Fri, 9 Mar 2018 12:30:06 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 9 Mar 2018 13:30:35 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (dev-r630-06.mtbc.labs.mlnx [10.12.205.180]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w29BU2gR021101; Fri, 9 Mar 2018 13:30:02 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id w29BU2De002218; Fri, 9 Mar 2018 19:30:02 +0800 Received: (from xuemingl@localhost) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id w29BU2fG002217; Fri, 9 Mar 2018 19:30:02 +0800 From: Xueming Li To: Wenzhuo Lu , Jingjing Wu , Thomas Monjalon , Nelio Laranjeiro , Adrien Mazarguil , Shahaf Shuler , Olivier Matz Cc: Xueming Li , dev@dpdk.org Date: Fri, 9 Mar 2018 19:29:13 +0800 Message-Id: <20180309112921.2105-14-xuemingl@mellanox.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20180309112921.2105-1-xuemingl@mellanox.com> References: <20180309112921.2105-1-xuemingl@mellanox.com> In-Reply-To: <20180226150947.107179-2-xuemingl@mellanox.com> References: <20180226150947.107179-2-xuemingl@mellanox.com> Subject: [dpdk-dev] [PATCH v1 13/21] net/mlx5: support 16 hardware priorities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since OFED 4.3-0.1.3.0, new driver support 16 Verbs priorities, adjust RTE FLOW priority mapping to: 0-3: RTE FLOW tunnel rule 4-7: RTE FLOW non-tunnel rule 8-15: PMD default control flow Signed-off-by: Xueming Li --- drivers/net/mlx5/mlx5_flow.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 27183d5..5e5184b 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -28,7 +28,16 @@ #include "mlx5_glue.h" /* Define minimal priority for control plane flows. */ +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT +/* 16 verb priorities since OFED 4.3, control flow start from 8. */ +#define MLX5_CTRL_FLOW_PRIORITY 8 +#else +/* 8 Verb priorities before OFED4.3, control flow start from 4. */ #define MLX5_CTRL_FLOW_PRIORITY 4 +#endif + +/* Define verb priority span for each flow. */ +#define MLX5_FLOW_PRIORITY_SPAN 4 /* Internet Protocol versions. */ #define MLX5_IPV4 4 @@ -1215,6 +1224,7 @@ struct ibv_spec_header { struct mlx5_flow_parse *parser) { const struct mlx5_flow_items *cur_item = mlx5_flow_items; + unsigned int priority_shift = attr->priority; unsigned int i; int ret; @@ -1234,13 +1244,20 @@ struct ibv_spec_header { if (ret) return ret; priv_flow_convert_finalise(priv, parser); +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + /* + * 16 priorities since OFED4.3, tunnel rules use highest priority 0-3, + * other user-flows use 4-7, control flows use lowest start from 8. + */ + if (!parser->tunnel) + priority_shift += MLX5_FLOW_PRIORITY_SPAN; +#endif /* * Second step. * Allocate the memory space to store verbs specifications. */ if (parser->drop) { - unsigned int priority = - attr->priority + + unsigned int priority = priority_shift + hash_rxq_init[HASH_RXQ_ETH].flow_priority; unsigned int offset = parser->queue[HASH_RXQ_ETH].offset; @@ -1253,8 +1270,7 @@ struct ibv_spec_header { sizeof(struct ibv_flow_attr); } else { for (i = 0; i != hash_rxq_init_n; ++i) { - unsigned int priority = - attr->priority + + unsigned int priority = priority_shift + hash_rxq_init[i].flow_priority; unsigned int offset; @@ -1298,7 +1314,7 @@ struct ibv_spec_header { priv_flow_convert_finalise(priv, parser); } else { parser->queue[HASH_RXQ_ETH].ibv_attr->priority = - attr->priority + + priority_shift + hash_rxq_init[parser->layer].flow_priority; } if (parser->mark)