From patchwork Wed Mar 28 15:43:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Didier Pallard X-Patchwork-Id: 36626 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DD5412C01; Wed, 28 Mar 2018 17:44:31 +0200 (CEST) Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by dpdk.org (Postfix) with ESMTP id A68C64C74 for ; Wed, 28 Mar 2018 17:44:27 +0200 (CEST) Received: by mail-wm0-f67.google.com with SMTP id p9so5779793wmc.3 for ; Wed, 28 Mar 2018 08:44:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id:in-reply-to:references; bh=rk8J9IGqYZjY8vF354/R1l0RGJoIDjV/3hryaQH9meo=; b=a6mS/cEVmJVgDWz3BVeRcHU6yUApGICGHKusHMOy9PqXRCzi9g6REXzRQkXLyES6Fa slK30wFrt67HLApzLSkvNA31fvXyMm5+dSEngs5Mp1hqCps+yYSnd28cvrr3JrQz1e8C K35VkqwQR5swhwZAviKeVCpZxx6zRQIQomeDDGWd5MvBdYYJ0VKUOa/rEOKlmgjVsnuu cWE1x/ZMa4ViySLcjEwJWaGAbT0GtShJryOdvqQp3vdpMCGd1jeRUDP7XnA4ZsZ3W9H5 AnVJZ5PCFebGrdwAeFRzB6gBjKlCejS6yvh8OIfxsz0Jjv1xhv3OmHJDOq71yyM9Srj5 M0PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=rk8J9IGqYZjY8vF354/R1l0RGJoIDjV/3hryaQH9meo=; b=P0rko3X+nbRgiAaW7o9vbg+mi/nIO3w0jO0Ohw8JvnccwWea1mNoc4RD50HMlM5kWY nuJSeJx14j8RLsHILl63rwXQYUxQO/03lI0uFiKIqwcvwLC1leb5FfoEwuexNopnlV+f LZ0InmOdsRM7qTzRuvz0MoC6Csw3WKfWRlj4P7qCkYkjvIPA2x+L7hGnPbnb7NhCqs5e Ysz7p0jbYlbqypMTtmhS1VZs3EHCqhJFXaUOEleP0utcdr861AbN3dE2hj2zb8CQljqb tpDTHps4QxEKH8aehC1SzmKwL/nakobBtk6+sQZ/4qmTlC1NBry2vJnojZ7SY4AZ9MQC 4pfQ== X-Gm-Message-State: AElRT7EgeuGtmZTfMEJQYYxMZZCPtZ7cg41Gf+TLF2q9Bd7I2GORkqNb cxmXsDEKCQfxdqb5D+K/aTBGOxTt X-Google-Smtp-Source: AIpwx4+CeEWleU65PvB7UrwZTUZGIFe59/PRWuFxn9L2bttBpV7/leoXVD9VTYqHqHdSZ2h40hoQ5w== X-Received: by 10.28.152.143 with SMTP id a137mr3296010wme.137.1522251866834; Wed, 28 Mar 2018 08:44:26 -0700 (PDT) Received: from pala.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com. [62.23.145.78]) by smtp.gmail.com with ESMTPSA id o23sm7957279wrf.93.2018.03.28.08.44.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Mar 2018 08:44:26 -0700 (PDT) From: Didier Pallard To: dev@dpdk.org Date: Wed, 28 Mar 2018 17:43:45 +0200 Message-Id: <20180328154349.24976-5-didier.pallard@6wind.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180328154349.24976-1-didier.pallard@6wind.com> References: <20180328154349.24976-1-didier.pallard@6wind.com> Subject: [dpdk-dev] [PATCH 4/8] net/vmxnet3: fix Rx offload information in multiseg packets X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In case we are working on a multisegment buffer, most bit are set in last segment of the buffer. Correctly look at those bits in eop part of the rx_offload function. Fixes: 2fdd835f992c ("vmxnet3: support jumbo frames") Signed-off-by: Didier Pallard --- drivers/net/vmxnet3/vmxnet3_rxtx.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/net/vmxnet3/vmxnet3_rxtx.c b/drivers/net/vmxnet3/vmxnet3_rxtx.c index 27f17ef0a..1acd6c19e 100644 --- a/drivers/net/vmxnet3/vmxnet3_rxtx.c +++ b/drivers/net/vmxnet3/vmxnet3_rxtx.c @@ -656,12 +656,19 @@ vmxnet3_rx_offload(struct vmxnet3_hw *hw, const Vmxnet3_RxCompDesc *rcd, /* Offloads set in sop */ if (sop) { + } else { /* Offloads set in eop */ /* Check for RSS */ if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE) { rxm->ol_flags |= PKT_RX_RSS_HASH; rxm->hash.rss = rcd->rssHash; } + /* Check for hardware stripped VLAN tag */ + if (rcd->ts) { + rxm->ol_flags |= (PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED); + rxm->vlan_tci = rte_le_to_cpu_16((uint16_t)rcd->tci); + } + /* Check packet type, checksum errors. Only IPv4 for now. */ if (rcd->v4) { rxm->packet_type = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN; @@ -676,12 +683,6 @@ vmxnet3_rx_offload(struct vmxnet3_hw *hw, const Vmxnet3_RxCompDesc *rcd, } else { rxm->packet_type = RTE_PTYPE_UNKNOWN; } - } else { /* Offloads set in eop */ - /* Check for hardware stripped VLAN tag */ - if (rcd->ts) { - rxm->ol_flags |= (PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED); - rxm->vlan_tci = rte_le_to_cpu_16((uint16_t)rcd->tci); - } } }