From patchwork Wed Apr 10 16:13:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob X-Patchwork-Id: 52606 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0CF6A1B1FC; Wed, 10 Apr 2019 18:14:57 +0200 (CEST) Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by dpdk.org (Postfix) with ESMTP id C25B61B1F6 for ; Wed, 10 Apr 2019 18:14:55 +0200 (CEST) Received: by mail-pg1-f193.google.com with SMTP id j26so1843156pgl.5 for ; Wed, 10 Apr 2019 09:14:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yq8T5RBiIWuQH392ylTBE0MLWauUMwsmw0lXszExkSc=; b=cmDDUdlmMJ29Sm6Lrg0dzexcmkH6Y5cUC77OqWcsZlEZaAAUn90lKk9gZD/KtL/O1+ /k+En3Q8EcQaFhLA1qF7K9cusGojI1M6XnU0vpStQGl6Dr8BVlKTzeHALpuCEMcPV5z/ 5LZk+dyybzSsNjugcSvjVEthpLqSapRDY3HahnhQRt8JPTwzmEWB4frKn9do4gNzhrGE O+srmazOHiZP59gcbmv2QZ4UN84a/G4Ex9T7pzv7E/gJl776nxBSk49BaSRYdEKN0crX cWSd1KSTrlBw1b46GH2qiJRVIzjRCh2yx+17HfZ+FCsqdD2F0/O6O+CnmD8UG3MMOhUC QeRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yq8T5RBiIWuQH392ylTBE0MLWauUMwsmw0lXszExkSc=; b=iWqdIK19eNS+M6zdWU8a0oXpH/9aSC+wkeLyxAEuhTq9ojz4eh/IRXVLAYVjMKnWpB CYr/q0E3aF8VbeBacREkGx2UGkV4nLRBkHAY+boR+QrqewtaDp+oksQQ2JbrIxwOUZ+s vIqS7OjrrZWY4iePxPX4/pX1EfNplyTjgcHStNcuZ9GF1S8cdt/O7bugxHIvE3VEq1gV rN/r6lbUVF2h0XGR3rrtARA+e4T0LqeRKFBuVWPR/8dy+Y9djSxdkbUsvsBQ/wXHpjIl WKylf7gazAXofBafraXKGngrQbV5vKDWfwwMLugcNXarO+P2dIX5JJ+EneUwZmd0A385 oiWQ== X-Gm-Message-State: APjAAAX4bZpnq/Up1OAq2kXVP9EgdhrVCbQCCbmxMQCgeIMmfsvf8Z9/ pqFt5tgroykHt6FA2cQX+ws= X-Google-Smtp-Source: APXvYqx46PiliZh3Od6wIr9daFep9RfMzs0ngahuAmmRJOK5QtqLA5Qt8NRTobrwMYTEVVSBJKMUjQ== X-Received: by 2002:aa7:83ce:: with SMTP id j14mr15420350pfn.57.1554912894424; Wed, 10 Apr 2019 09:14:54 -0700 (PDT) Received: from jerin.caveonetworks.com ([122.178.209.229]) by smtp.gmail.com with ESMTPSA id s79sm88447577pfa.31.2019.04.10.09.14.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 10 Apr 2019 09:14:53 -0700 (PDT) From: jerinjacobk@gmail.com X-Google-Original-From: jerinj@marvell.com To: Thomas Monjalon Cc: dev@dpdk.org, yskoh@mellanox.com, Pavan Nikhilesh , Jerin Jacob Date: Wed, 10 Apr 2019 21:43:58 +0530 Message-Id: <20190410161400.9361-2-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190410161400.9361-1-jerinj@marvell.com> References: <20190406142737.20091-1-jerinj@marvell.com> <20190410161400.9361-1-jerinj@marvell.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Currently, RTE_* flags are set based on the implementer ID but there might be some micro arch specific differences from the same vendor eg. CACHE_LINESIZE. Add support to set micro arch specific flags. Signed-off-by: Pavan Nikhilesh Signed-off-by: Jerin Jacob --- config/arm/meson.build | 56 ++++++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 24 deletions(-) diff --git a/config/arm/meson.build b/config/arm/meson.build index 170a4981a..24bce2b39 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -7,25 +7,6 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false -machine_args_generic = [ - ['default', ['-march=armv8-a+crc+crypto']], - ['native', ['-march=native']], - ['0xd03', ['-mcpu=cortex-a53']], - ['0xd04', ['-mcpu=cortex-a35']], - ['0xd05', ['-mcpu=cortex-a55']], - ['0xd07', ['-mcpu=cortex-a57']], - ['0xd08', ['-mcpu=cortex-a72']], - ['0xd09', ['-mcpu=cortex-a73']], - ['0xd0a', ['-mcpu=cortex-a75']], - ['0xd0b', ['-mcpu=cortex-a76']], -] -machine_args_cavium = [ - ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], - ['native', ['-march=native']], - ['0xa1', ['-mcpu=thunderxt88']], - ['0xa2', ['-mcpu=thunderxt81']], - ['0xa3', ['-mcpu=thunderxt83']]] - flags_common_default = [ # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file @@ -52,12 +33,10 @@ flags_generic = [ ['RTE_USE_C11_MEM_MODEL', true], ['RTE_CACHE_LINE_SIZE', 128]] flags_cavium = [ - ['RTE_MACHINE', '"thunderx"'], ['RTE_CACHE_LINE_SIZE', 128], ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], - ['RTE_MAX_VFIO_GROUPS', 128], - ['RTE_USE_C11_MEM_MODEL', false]] + ['RTE_MAX_VFIO_GROUPS', 128]] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_USE_C11_MEM_MODEL', true], @@ -71,6 +50,27 @@ flags_dpaa2 = [ ['RTE_MAX_NUMA_NODES', 1], ['RTE_MAX_LCORE', 16], ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] +flags_default_extra = [] +flags_thunderx_extra = [ + ['RTE_MACHINE', '"thunderx"'], + ['RTE_USE_C11_MEM_MODEL', false]] + +machine_args_generic = [ + ['default', ['-march=armv8-a+crc+crypto']], + ['native', ['-march=native']], + ['0xd03', ['-mcpu=cortex-a53']], + ['0xd04', ['-mcpu=cortex-a35']], + ['0xd07', ['-mcpu=cortex-a57']], + ['0xd08', ['-mcpu=cortex-a72']], + ['0xd09', ['-mcpu=cortex-a73']], + ['0xd0a', ['-mcpu=cortex-a75']]] + +machine_args_cavium = [ + ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']], + ['native', ['-march=native']], + ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], + ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], + ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] @@ -157,8 +157,16 @@ else endif foreach marg: machine[2] if marg[0] == impl_pn - foreach f: marg[1] - machine_args += f + foreach flag: marg[1] + if cc.has_argument(flag) + machine_args += flag + endif + endforeach + # Apply any extra machine specific flags. + foreach flag: marg.get(2, flags_default_extra) + if flag.length() > 0 + dpdk_conf.set(flag[0], flag[1]) + endif endforeach endif endforeach