From patchwork Tue Jul 16 07:01:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 56472 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B747B2BE1; Tue, 16 Jul 2019 09:02:04 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 939A02BD5 for ; Tue, 16 Jul 2019 09:02:03 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x6G6uDLA009142; Tue, 16 Jul 2019 00:02:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=pzJzA3mieZwkglEgRld6meg99StV01D3xp1lARacPiw=; b=F8o6qb6cQs2etH5IKjTGlqhUwrEfbG7GVaTLrKk+V0lE+bR1kDByvbRPMzwkxPLJ9jrn SLu37MH5JnCzMCCJhxhkWnVwrH+kmqX01jUurtLsAyGGvQO52Wg77507atYAE0DxgGEf KsOJQqOsU/KN8CkwoNHNYYsDgaUexr6CVFJbvLa2Y6120TKR02GfuRObjT+Jk6JRrqPu Rw9fIu7z6jE88XrCwOgY7yhvGpCeOtMr5tt96ATeldfDkwvZkqKIHhthOB52AfA7VvhR 5CqeRm5AAUKCuh3JK9W876ldFA372NP9mseorS7IlbKLeuq/khpGXF4q+bKVm8d+gu7+ ZQ== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2ts0a21w39-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 16 Jul 2019 00:02:02 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 16 Jul 2019 00:02:00 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Tue, 16 Jul 2019 00:02:00 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 3DF7E3F703F; Tue, 16 Jul 2019 00:01:56 -0700 (PDT) From: Nithin Dabilpuram To: Hyong Youb Kim , David Marchand , Thomas Monjalon , "Ferruh Yigit" CC: , John Daley , Shahed Shaikh , , Nithin Dabilpuram Date: Tue, 16 Jul 2019 12:31:54 +0530 Message-ID: <20190716070154.63544-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:5.22.84,1.0.8 definitions=2019-07-16_02:2019-07-16,2019-07-16 signatures=0 Subject: [dpdk-dev] [RFC PATCH v2] eal: add mask and unmask interrupt apis X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add new mask and unmask interrupt api's specifically for VFIO_LEGACY type of interrupts. For legacy/intx vfio-pci masks the interrupt before posting the event and application has to unmask it as a part of its interrupt handling. Hence these new api's can be used for the light-weight operation of masking and unmasking. In all the other VFIO interrupts i.e MSI & MSIx, vfio-pci doesn't do anything like that and there is also no implementation for masking and unmasking. For qede intx handling, we can call the new api for unmasking interrupt. We have not tested it on qede. --- drivers/net/qede/qede_ethdev.c | 6 +- lib/librte_eal/common/include/rte_interrupts.h | 23 ++++ lib/librte_eal/linux/eal/eal_interrupts.c | 155 +++++++++++++++++++++++++ 3 files changed, 180 insertions(+), 4 deletions(-) diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c index 82363e6..20b7587 100644 --- a/drivers/net/qede/qede_ethdev.c +++ b/drivers/net/qede/qede_ethdev.c @@ -248,8 +248,8 @@ qede_interrupt_handler_intx(void *param) if (status & 0x1) { qede_interrupt_action(ECORE_LEADING_HWFN(edev)); - if (rte_intr_enable(eth_dev->intr_handle)) - DP_ERR(edev, "rte_intr_enable failed\n"); + if (rte_intr_unmask(eth_dev->intr_handle)) + DP_ERR(edev, "rte_intr_unmask failed\n"); } } @@ -261,8 +261,6 @@ qede_interrupt_handler(void *param) struct ecore_dev *edev = &qdev->edev; qede_interrupt_action(ECORE_LEADING_HWFN(edev)); - if (rte_intr_enable(eth_dev->intr_handle)) - DP_ERR(edev, "rte_intr_enable failed\n"); } static void diff --git a/lib/librte_eal/common/include/rte_interrupts.h b/lib/librte_eal/common/include/rte_interrupts.h index c1e912c..b0675be 100644 --- a/lib/librte_eal/common/include/rte_interrupts.h +++ b/lib/librte_eal/common/include/rte_interrupts.h @@ -118,6 +118,29 @@ int rte_intr_enable(const struct rte_intr_handle *intr_handle); */ int rte_intr_disable(const struct rte_intr_handle *intr_handle); +/** + * It masks the interrupt for the specified handle. + * + * @param intr_handle + * pointer to the interrupt handle. + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +int rte_intr_mask(const struct rte_intr_handle *intr_handle); + +/** + * It unmasks the interrupt for the specified handle. + * + * @param intr_handle + * pointer to the interrupt handle. + * + * @return + * - On success, zero. + * - On failure, a negative value. + */ +int rte_intr_unmask(const struct rte_intr_handle *intr_handle); #ifdef __cplusplus } #endif diff --git a/lib/librte_eal/linux/eal/eal_interrupts.c b/lib/librte_eal/linux/eal/eal_interrupts.c index 79ad5e8..d91022c 100644 --- a/lib/librte_eal/linux/eal/eal_interrupts.c +++ b/lib/librte_eal/linux/eal/eal_interrupts.c @@ -197,6 +197,63 @@ vfio_disable_intx(const struct rte_intr_handle *intr_handle) { return 0; } +/* unmask legacy (INTx) interrupts */ +static int +vfio_unmask_intx(const struct rte_intr_handle *intr_handle) +{ + struct vfio_irq_set *irq_set; + char irq_set_buf[IRQ_SET_BUF_LEN]; + int len, ret; + + len = sizeof(struct vfio_irq_set); + + /* unmask INTx */ + irq_set = (struct vfio_irq_set *) irq_set_buf; + memset(irq_set, 0, len); + irq_set->argsz = len; + irq_set->count = 1; + irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK; + irq_set->index = VFIO_PCI_INTX_IRQ_INDEX; + irq_set->start = 0; + + ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set); + + if (ret) { + RTE_LOG(ERR, EAL, "Error unmasking INTx interrupts for fd %d\n", + intr_handle->fd); + return -1; + } + return 0; +} + +/* mask legacy (INTx) interrupts */ +static int +vfio_mask_intx(const struct rte_intr_handle *intr_handle) +{ + struct vfio_irq_set *irq_set; + char irq_set_buf[IRQ_SET_BUF_LEN]; + int len, ret; + + len = sizeof(struct vfio_irq_set); + + /* mask interrupts */ + irq_set = (struct vfio_irq_set *) irq_set_buf; + irq_set->argsz = len; + irq_set->count = 1; + irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_MASK; + irq_set->index = VFIO_PCI_INTX_IRQ_INDEX; + irq_set->start = 0; + + ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set); + + if (ret) { + RTE_LOG(ERR, EAL, "Error masking INTx interrupts for fd %d\n", + intr_handle->fd); + return -1; + } + + return 0; +} /* enable MSI interrupts */ static int vfio_enable_msi(const struct rte_intr_handle *intr_handle) { @@ -694,6 +751,104 @@ rte_intr_enable(const struct rte_intr_handle *intr_handle) } int +rte_intr_mask(const struct rte_intr_handle *intr_handle) +{ + if (intr_handle && intr_handle->type == RTE_INTR_HANDLE_VDEV) + return 0; + + if (!intr_handle || intr_handle->fd < 0 || intr_handle->uio_cfg_fd < 0) + return -1; + + switch (intr_handle->type){ + /* Both masking and disabling are same for UIO */ + case RTE_INTR_HANDLE_UIO: + if (uio_intr_disable(intr_handle)) + return -1; + break; + case RTE_INTR_HANDLE_UIO_INTX: + if (uio_intx_intr_disable(intr_handle)) + return -1; + break; + /* not used at this moment */ + case RTE_INTR_HANDLE_ALARM: + return -1; +#ifdef VFIO_PRESENT + case RTE_INTR_HANDLE_VFIO_MSIX: + case RTE_INTR_HANDLE_VFIO_MSI: + return -1; + case RTE_INTR_HANDLE_VFIO_LEGACY: + if (vfio_mask_intx(intr_handle)) + return -1; + break; +#ifdef HAVE_VFIO_DEV_REQ_INTERFACE + case RTE_INTR_HANDLE_VFIO_REQ: + return -1; +#endif +#endif + /* not used at this moment */ + case RTE_INTR_HANDLE_DEV_EVENT: + return -1; + /* unknown handle type */ + default: + RTE_LOG(ERR, EAL, + "Unknown handle type of fd %d\n", + intr_handle->fd); + return -1; + } + + return 0; +} + +int +rte_intr_unmask(const struct rte_intr_handle *intr_handle) +{ + if (intr_handle && intr_handle->type == RTE_INTR_HANDLE_VDEV) + return 0; + + if (!intr_handle || intr_handle->fd < 0 || intr_handle->uio_cfg_fd < 0) + return -1; + + switch (intr_handle->type){ + /* Both unmasking and disabling are same for UIO */ + case RTE_INTR_HANDLE_UIO: + if (uio_intr_enable(intr_handle)) + return -1; + break; + case RTE_INTR_HANDLE_UIO_INTX: + if (uio_intx_intr_enable(intr_handle)) + return -1; + break; + /* not used at this moment */ + case RTE_INTR_HANDLE_ALARM: + return -1; +#ifdef VFIO_PRESENT + case RTE_INTR_HANDLE_VFIO_MSIX: + case RTE_INTR_HANDLE_VFIO_MSI: + return -1; + case RTE_INTR_HANDLE_VFIO_LEGACY: + if (vfio_unmask_intx(intr_handle)) + return -1; + break; +#ifdef HAVE_VFIO_DEV_REQ_INTERFACE + case RTE_INTR_HANDLE_VFIO_REQ: + return -1; +#endif +#endif + /* not used at this moment */ + case RTE_INTR_HANDLE_DEV_EVENT: + return -1; + /* unknown handle type */ + default: + RTE_LOG(ERR, EAL, + "Unknown handle type of fd %d\n", + intr_handle->fd); + return -1; + } + + return 0; +} + +int rte_intr_disable(const struct rte_intr_handle *intr_handle) { if (intr_handle && intr_handle->type == RTE_INTR_HANDLE_VDEV)