> -----Original Message-----
> From: Nithin Dabilpuram <ndabilpuram@marvell.com>
> Sent: Wednesday, July 17, 2019 5:29 PM
> To: Hyong Youb Kim <hyonkim@cisco.com>; David Marchand
> <david.marchand@redhat.com>; Thomas Monjalon <thomas@monjalon.net>;
> Ferruh Yigit <ferruh.yigit@intel.com>; Igor Russkikh
> <igor.russkikh@aquantia.com>; Pavel Belous <pavel.belous@aquantia.com>;
> Allain Legacy <allain.legacy@windriver.com>; Matt Peters
> <matt.peters@windriver.com>; Ravi Kumar <ravi1.kumar@amd.com>; Rasesh
> Mody <rmody@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>;
> Wenzhuo Lu <wenzhuo.lu@intel.com>; Qi Zhang <qi.z.zhang@intel.com>; Xiao
> Wang <xiao.w.wang@intel.com>; Beilei Xing <beilei.xing@intel.com>; Jingjing
> Wu <jingjing.wu@intel.com>; Qiming Yang <qiming.yang@intel.com>;
> Konstantin Ananyev <konstantin.ananyev@intel.com>; Alejandro Lucero
> <alejandro.lucero@netronome.com>; Andrew Rybchenko
> <arybchenko@solarflare.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>; Tiwei Bie <tiwei.bie@intel.com>; Zhihong
> Wang <zhihong.wang@intel.com>; Yong Wang <yongwang@vmware.com>
> Cc: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; John Daley
> <johndale@cisco.com>; dev@dpdk.org; Nithin Kumar Dabilpuram
> <ndabilpuram@marvell.com>
> Subject: [PATCH 3/3] drivers/net: use ack API in interrupt handlers
>
> Replace rte_intr_enable() with rte_intr_ack() API for acking an interrupt in
> interrupt handlers and
> rx_queue_intr_enable() callbacks of PMD's.
>
> This is inline with original intent of this change in PMDs to ack interrupts after
> handling is completed if device is backed by UIO, IGB_UIO or VFIO(with INTx).
>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
> Signed-off-by: Jerin Jacob <jerinj@marvell.com>
> ---
> drivers/net/atlantic/Makefile | 1 +
> drivers/net/atlantic/atl_ethdev.c | 2 +-
> drivers/net/atlantic/meson.build | 2 ++
> drivers/net/avp/avp_ethdev.c | 2 +-
> drivers/net/avp/meson.build | 1 +
> drivers/net/axgbe/Makefile | 1 +
> drivers/net/axgbe/axgbe_ethdev.c | 4 ++--
> drivers/net/axgbe/meson.build | 1 +
> drivers/net/bnx2x/bnx2x_ethdev.c | 2 +-
> drivers/net/bnx2x/meson.build | 1 +
> drivers/net/e1000/em_ethdev.c | 4 ++--
> drivers/net/e1000/igb_ethdev.c | 6 +++---
> drivers/net/fm10k/fm10k_ethdev.c | 6 +++---
> drivers/net/fm10k/meson.build | 1 +
> drivers/net/i40e/i40e_ethdev.c | 2 +-
> drivers/net/iavf/iavf_ethdev.c | 2 +-
> drivers/net/ice/Makefile | 1 +
> drivers/net/ice/ice_ethdev.c | 4 ++--
> drivers/net/ice/meson.build | 1 +
> drivers/net/ixgbe/ixgbe_ethdev.c | 6 +++---
> drivers/net/nfp/nfp_net.c | 2 +-
> drivers/net/qede/Makefile | 1 +
> drivers/net/qede/meson.build | 2 ++
> drivers/net/qede/qede_ethdev.c | 8 ++++----
> drivers/net/sfc/sfc_intr.c | 4 ++--
> drivers/net/virtio/virtio_ethdev.c | 16 +++++++++++++++-
> drivers/net/vmxnet3/vmxnet3_ethdev.c | 2 +-
> 27 files changed, 56 insertions(+), 29 deletions(-)
>
...
Hi Nithin, Jerin and Hyong,
I have tested this series with all igb_uio, vfio-pci and uio_pci_generic modules which covers both MSIx and INTx modes and everything is working fine.
> a/drivers/net/qede/meson.build b/drivers/net/qede/meson.build index
> 12388a6..c8f9c6d 100644
> --- a/drivers/net/qede/meson.build
> +++ b/drivers/net/qede/meson.build
> @@ -10,3 +10,5 @@ sources = files(
> 'qede_main.c',
> 'qede_rxtx.c',
> )
> +
> +cflags += '-DALLOW_EXPERIMENTAL_API'
> diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
> index 82363e6..9ac9da3 100644
> --- a/drivers/net/qede/qede_ethdev.c
> +++ b/drivers/net/qede/qede_ethdev.c
> @@ -248,8 +248,8 @@ qede_interrupt_handler_intx(void *param)
> if (status & 0x1) {
> qede_interrupt_action(ECORE_LEADING_HWFN(edev));
>
> - if (rte_intr_enable(eth_dev->intr_handle))
> - DP_ERR(edev, "rte_intr_enable failed\n");
> + if (rte_intr_ack(eth_dev->intr_handle))
> + DP_ERR(edev, "rte_intr_ack failed\n");
> }
> }
ACK for this change.
>
> @@ -261,8 +261,8 @@ qede_interrupt_handler(void *param)
> struct ecore_dev *edev = &qdev->edev;
>
> qede_interrupt_action(ECORE_LEADING_HWFN(edev));
> - if (rte_intr_enable(eth_dev->intr_handle))
> - DP_ERR(edev, "rte_intr_enable failed\n");
> + if (rte_intr_ack(eth_dev->intr_handle))
> + DP_ERR(edev, "rte_intr_ack failed\n");
> }
>
I tried to remove rte_intr_ack() from MSIx interrupt handler in qede and device still generates interrupts. That means in MSIx interrupt handler - qede_interrupt_handler(), we can remove rte_intr_ack()/rte_intr_enable() call.
So for qede PMD -
Acked-by: Shahed Shaikh <shshaikh@marvell.com>
For whole series -
Tested-by: Shahed Shaikh <shshaikh@marvell.com>
Thanks,
Shahed
.
@@ -10,6 +10,7 @@ LIB = librte_pmd_atlantic.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
EXPORT_MAP := rte_pmd_atlantic_version.map
@@ -1394,7 +1394,7 @@ atl_dev_interrupt_action(struct rte_eth_dev *dev,
}
done:
atl_enable_intr(dev);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -11,3 +11,5 @@ sources = files(
'hw_atl/hw_atl_utils.c',
'rte_pmd_atlantic.c',
)
+
+cflags += '-DALLOW_EXPERIMENTAL_API'
@@ -713,7 +713,7 @@ avp_dev_interrupt_handler(void *data)
status);
/* re-enable UIO interrupt handling */
- ret = rte_intr_enable(&pci_dev->intr_handle);
+ ret = rte_intr_ack(&pci_dev->intr_handle);
if (ret < 0) {
PMD_DRV_LOG(ERR, "Failed to re-enable UIO interrupts, ret=%d\n",
ret);
@@ -7,3 +7,4 @@ if not is_linux
endif
sources = files('avp_ethdev.c')
install_headers('rte_avp_common.h', 'rte_avp_fifo.h')
+cflags += '-DALLOW_EXPERIMENTAL_API'
@@ -10,6 +10,7 @@ LIB = librte_pmd_axgbe.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
EXPORT_MAP := rte_pmd_axgbe_version.map
@@ -136,8 +136,8 @@ axgbe_dev_interrupt_handler(void *param)
DMA_CH_SR, dma_ch_isr);
}
}
- /* Enable interrupts since disabled after generation*/
- rte_intr_enable(&pdata->pci_dev->intr_handle);
+ /* Unmask interrupts since disabled after generation*/
+ rte_intr_ack(&pdata->pci_dev->intr_handle);
}
/*
@@ -14,6 +14,7 @@ sources = files('axgbe_ethdev.c',
'axgbe_rxtx.c')
cflags += '-Wno-cast-qual'
+cflags += '-DALLOW_EXPERIMENTAL_API'
if arch_subdir == 'x86'
sources += files('axgbe_rxtx_vec_sse.c')
@@ -133,7 +133,7 @@ bnx2x_interrupt_handler(void *param)
PMD_DEBUG_PERIODIC_LOG(INFO, sc, "Interrupt handled");
bnx2x_interrupt_action(dev, 1);
- rte_intr_enable(&sc->pci_dev->intr_handle);
+ rte_intr_ack(&sc->pci_dev->intr_handle);
}
static void bnx2x_periodic_start(void *param)
@@ -6,6 +6,7 @@ build = dep.found()
reason = 'missing dependency, "zlib"'
ext_deps += dep
cflags += '-DZLIB_CONST'
+cflags += '-DALLOW_EXPERIMENTAL_API'
sources = files('bnx2x.c',
'bnx2x_ethdev.c',
'bnx2x_rxtx.c',
@@ -1001,7 +1001,7 @@ eth_em_rx_queue_intr_enable(struct rte_eth_dev *dev, __rte_unused uint16_t queue
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
em_rxq_intr_enable(hw);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -1568,7 +1568,7 @@ eth_em_interrupt_action(struct rte_eth_dev *dev,
return -1;
intr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
/* set get_link_status to check register later */
hw->mac.get_link_status = 1;
@@ -2876,7 +2876,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev,
}
igb_intr_enable(dev);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
if (intr->flags & E1000_FLAG_NEED_LINK_UPDATE) {
intr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;
@@ -2987,7 +2987,7 @@ eth_igbvf_interrupt_action(struct rte_eth_dev *dev, struct rte_intr_handle *intr
}
igbvf_intr_enable(dev);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -5500,7 +5500,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
E1000_WRITE_REG(hw, E1000_EIMS, regval | mask);
E1000_WRITE_FLUSH(hw);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -2381,7 +2381,7 @@ fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
else
FM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(pdev, queue_id)),
FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);
- rte_intr_enable(&pdev->intr_handle);
+ rte_intr_ack(&pdev->intr_handle);
return 0;
}
@@ -2680,7 +2680,7 @@ fm10k_dev_interrupt_handler_pf(void *param)
FM10K_WRITE_REG(hw, FM10K_ITR(0), FM10K_ITR_AUTOMASK |
FM10K_ITR_MASK_CLEAR);
/* Re-enable interrupt from host side */
- rte_intr_enable(dev->intr_handle);
+ rte_intr_ack(dev->intr_handle);
}
/**
@@ -2760,7 +2760,7 @@ fm10k_dev_interrupt_handler_vf(void *param)
FM10K_WRITE_REG(hw, FM10K_VFITR(0), FM10K_ITR_AUTOMASK |
FM10K_ITR_MASK_CLEAR);
/* Re-enable interrupt from host side */
- rte_intr_enable(dev->intr_handle);
+ rte_intr_ack(dev->intr_handle);
}
/* Mailbox message handler in VF */
@@ -14,3 +14,4 @@ if arch_subdir == 'x86'
endif
includes += include_directories('base')
+cflags += '-DALLOW_EXPERIMENTAL_API'
@@ -11646,7 +11646,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK);
I40E_WRITE_FLUSH(hw);
- rte_intr_enable(&pci_dev->intr_handle);
+ rte_intr_ack(&pci_dev->intr_handle);
return 0;
}
@@ -1098,7 +1098,7 @@ iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
IAVF_WRITE_FLUSH(hw);
- rte_intr_enable(&pci_dev->intr_handle);
+ rte_intr_ack(&pci_dev->intr_handle);
return 0;
}
@@ -10,6 +10,7 @@ LIB = librte_pmd_ice.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_ethdev -lrte_kvargs
LDLIBS += -lrte_bus_pci -lrte_mempool
@@ -1118,7 +1118,7 @@ ice_interrupt_handler(void *param)
done:
/* Enable interrupt */
ice_pf_enable_irq0(hw);
- rte_intr_enable(dev->intr_handle);
+ rte_intr_ack(dev->intr_handle);
}
/* Initialize SW parameters of PF */
@@ -3002,7 +3002,7 @@ static int ice_rx_queue_intr_enable(struct rte_eth_dev *dev,
val &= ~GLINT_DYN_CTL_WB_ON_ITR_M;
ICE_WRITE_REG(hw, GLINT_DYN_CTL(msix_intr), val);
- rte_intr_enable(&pci_dev->intr_handle);
+ rte_intr_ack(&pci_dev->intr_handle);
return 0;
}
@@ -13,6 +13,7 @@ sources = files(
deps += ['hash']
includes += include_directories('base')
+cflags += '-DALLOW_EXPERIMENTAL_API'
if arch_subdir == 'x86'
sources += files('ice_rxtx_vec_sse.c')
@@ -4502,7 +4502,7 @@ ixgbe_dev_interrupt_delayed_handler(void *param)
PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
ixgbe_enable_intr(dev);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
}
/**
@@ -5763,7 +5763,7 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
RTE_SET_USED(queue_id);
IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask);
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -5812,7 +5812,7 @@ ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
mask &= (1 << (queue_id - 32));
IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
}
- rte_intr_enable(intr_handle);
+ rte_intr_ack(intr_handle);
return 0;
}
@@ -1412,7 +1412,7 @@ nfp_net_irq_unmask(struct rte_eth_dev *dev)
if (hw->ctrl & NFP_NET_CFG_CTRL_MSIXAUTO) {
/* If MSI-X auto-masking is used, clear the entry */
rte_wmb();
- rte_intr_enable(&pci_dev->intr_handle);
+ rte_intr_ack(&pci_dev->intr_handle);
} else {
/* Make sure all updates are written before un-masking */
rte_wmb();
@@ -12,6 +12,7 @@ LIB = librte_pmd_qede.a
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DALLOW_EXPERIMENTAL_API
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_bus_pci
@@ -10,3 +10,5 @@ sources = files(
'qede_main.c',
'qede_rxtx.c',
)
+
+cflags += '-DALLOW_EXPERIMENTAL_API'
@@ -248,8 +248,8 @@ qede_interrupt_handler_intx(void *param)
if (status & 0x1) {
qede_interrupt_action(ECORE_LEADING_HWFN(edev));
- if (rte_intr_enable(eth_dev->intr_handle))
- DP_ERR(edev, "rte_intr_enable failed\n");
+ if (rte_intr_ack(eth_dev->intr_handle))
+ DP_ERR(edev, "rte_intr_ack failed\n");
}
}
@@ -261,8 +261,8 @@ qede_interrupt_handler(void *param)
struct ecore_dev *edev = &qdev->edev;
qede_interrupt_action(ECORE_LEADING_HWFN(edev));
- if (rte_intr_enable(eth_dev->intr_handle))
- DP_ERR(edev, "rte_intr_enable failed\n");
+ if (rte_intr_ack(eth_dev->intr_handle))
+ DP_ERR(edev, "rte_intr_ack failed\n");
}
static void
@@ -79,7 +79,7 @@ sfc_intr_line_handler(void *cb_arg)
if (qmask & (1 << sa->mgmt_evq_index))
sfc_intr_handle_mgmt_evq(sa);
- if (rte_intr_enable(&pci_dev->intr_handle) != 0)
+ if (rte_intr_ack(&pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");
@@ -123,7 +123,7 @@ sfc_intr_message_handler(void *cb_arg)
sfc_intr_handle_mgmt_evq(sa);
- if (rte_intr_enable(&pci_dev->intr_handle) != 0)
+ if (rte_intr_ack(&pci_dev->intr_handle) != 0)
sfc_err(sa, "cannot reenable interrupts");
sfc_log_init(sa, "done");
@@ -1265,6 +1265,20 @@ virtio_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
}
static int
+virtio_intr_unmask(struct rte_eth_dev *dev)
+{
+ struct virtio_hw *hw = dev->data->dev_private;
+
+ if (rte_intr_ack(dev->intr_handle) < 0)
+ return -1;
+
+ if (!hw->virtio_user_dev)
+ hw->use_msix = vtpci_msix_detect(RTE_ETH_DEV_TO_PCI(dev));
+
+ return 0;
+}
+
+static int
virtio_intr_enable(struct rte_eth_dev *dev)
{
struct virtio_hw *hw = dev->data->dev_private;
@@ -1457,7 +1471,7 @@ virtio_interrupt_handler(void *param)
isr = vtpci_isr(hw);
PMD_DRV_LOG(INFO, "interrupt status = %#x", isr);
- if (virtio_intr_enable(dev) < 0)
+ if (virtio_intr_unmask(dev) < 0)
PMD_DRV_LOG(ERR, "interrupt enable failed");
if (isr & VIRTIO_PCI_ISR_CONFIG) {
@@ -1426,7 +1426,7 @@ vmxnet3_interrupt_handler(void *param)
vmxnet3_process_events(dev);
- if (rte_intr_enable(&pci_dev->intr_handle) < 0)
+ if (rte_intr_ack(&pci_dev->intr_handle) < 0)
PMD_DRV_LOG(ERR, "interrupt enable failed");
}