From patchwork Wed Jul 22 08:07:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dybkowski, AdamX" X-Patchwork-Id: 74609 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BBEB3A0526; Wed, 22 Jul 2020 10:08:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2931E1BFEF; Wed, 22 Jul 2020 10:08:12 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id BB8F61BFE7 for ; Wed, 22 Jul 2020 10:08:07 +0200 (CEST) IronPort-SDR: 6rj065k3WNQCXqWzWaGJc/tpCQMA/cMwuYqsEmh+1WC7ZLi6zbTX+pYgxit+gUSfr/G9ZwV2Fw GOngDvvHAVGQ== X-IronPort-AV: E=McAfee;i="6000,8403,9689"; a="214928885" X-IronPort-AV: E=Sophos;i="5.75,381,1589266800"; d="scan'208";a="214928885" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jul 2020 01:08:06 -0700 IronPort-SDR: pH7M2yReGLq415rYr/Sm7dI79TPwXKgpdEEllFRUI+uJPu/dnHJZ/qVKdzjbn1dNKyXP+6teHu XYWeXM8tqgwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,381,1589266800"; d="scan'208";a="301878762" Received: from adamdybx-mobl.ger.corp.intel.com ([10.104.121.92]) by orsmga002.jf.intel.com with ESMTP; 22 Jul 2020 01:08:05 -0700 From: Adam Dybkowski To: dev@dpdk.org, fiona.trahe@intel.com, akhil.goyal@nxp.com Cc: Adam Dybkowski Date: Wed, 22 Jul 2020 10:07:20 +0200 Message-Id: <20200722080720.5977-2-adamx.dybkowski@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200722080720.5977-1-adamx.dybkowski@intel.com> References: <20200716114723.965-1-adamx.dybkowski@intel.com> <20200722080720.5977-1-adamx.dybkowski@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v4 1/1] common/qat: support GEN2 QAT device 200xx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This adds pci detection and documentation for Intel GEN2 QuickAssist device 200xx (PF Did 0x18ee, VF Did 0x18ef). Signed-off-by: Adam Dybkowski Acked-by: Fiona Trahe --- doc/guides/cryptodevs/qat.rst | 7 +++++-- doc/guides/rel_notes/release_20_08.rst | 8 +++++--- drivers/common/qat/qat_device.c | 6 +++++- 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 7ede427a2..e5d2cf499 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -22,6 +22,7 @@ poll mode crypto driver support for the following hardware accelerator devices: * ``Intel QuickAssist Technology DH895xCC`` * ``Intel QuickAssist Technology C62x`` * ``Intel QuickAssist Technology C3xxx`` +* ``Intel QuickAssist Technology 200xx`` * ``Intel QuickAssist Technology D15xx`` * ``Intel QuickAssist Technology C4xxx`` @@ -393,6 +394,8 @@ to see the full table) +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | Yes | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | No | No | 2 | 200xx | p | qat_200xx | 200xx | 18ee | 1 | 18ef | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 2 | D15xx | 01.org/4.2.0+ | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | @@ -619,8 +622,8 @@ adjust the unbind command below:: done; \ done -For Intel(R) QuickAssist Technology C3xxx or D15xx device -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +For Intel(R) QuickAssist Technology C3xxx or 200xx or D15xx device +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your VFs are different adjust the unbind command below:: diff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst index 2c8ac3647..48620e823 100644 --- a/doc/guides/rel_notes/release_20_08.rst +++ b/doc/guides/rel_notes/release_20_08.rst @@ -187,10 +187,12 @@ New Features * **Updated the QuickAssist Technology (QAT) PMD.** - * Added support for lookaside protocol offload for DOCSIS through the - ``rte_security`` API. - * Added Chacha20-Poly1305 AEAD algorithm. + * Added support for lookaside protocol offload in QAT crypto PMD + for DOCSIS through the ``rte_security`` API. + * Added Chacha20-Poly1305 AEAD algorithm in QAT crypto PMD. * Improved handling of multi process in QAT crypto and compression PMDs. + * Added support for Intel GEN2 QuickAssist device 200xx + (PF Did 0x18ee, VF Did 0x18ef). * **Updated the OCTEON TX2 crypto PMD.** diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index a6ab29f95..b050ce20e 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2018 Intel Corporation + * Copyright(c) 2018-2020 Intel Corporation */ #include @@ -53,6 +53,9 @@ static const struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x6f55), }, + { + RTE_PCI_DEVICE(0x8086, 0x18ef), + }, { RTE_PCI_DEVICE(0x8086, 0x18a1), }, @@ -223,6 +226,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev, case 0x37c9: case 0x19e3: case 0x6f55: + case 0x18ef: qat_dev->qat_dev_gen = QAT_GEN2; break; case 0x18a1: