net/iavf: fix Rx offload flags in SSE path

Message ID 20201027101507.7440-1-alvinx.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series net/iavf: fix Rx offload flags in SSE path |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-broadcom-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/travis-robot success Travis build: passed
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS

Commit Message

Alvin Zhang Oct. 27, 2020, 10:15 a.m. UTC
  From: Alvin Zhang <alvinx.zhang@intel.com>

Update reading offload flags of last two of four packets.

Fixes: 1162f5a0ef31 ("net/iavf: support flexible Rx descriptor in SSE path")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
---
 drivers/net/iavf/iavf_rxtx_vec_sse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Qi Zhang Oct. 27, 2020, 2:04 p.m. UTC | #1
> -----Original Message-----
> From: Zhang,Alvin <alvinx.zhang@intel.com>
> Sent: Tuesday, October 27, 2020 6:15 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zhang@intel.com>; stable@dpdk.org
> Subject: [PATCH] net/iavf: fix Rx offload flags in SSE path
> 
> From: Alvin Zhang <alvinx.zhang@intel.com>
> 
> Update reading offload flags of last two of four packets.
> 
> Fixes: 1162f5a0ef31 ("net/iavf: support flexible Rx descriptor in SSE path")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>

Acked-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
  

Patch

diff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c
index 85c5bd4..828b46e 100644
--- a/drivers/net/iavf/iavf_rxtx_vec_sse.c
+++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c
@@ -267,7 +267,7 @@ 
 	flags = _mm_unpackhi_epi32(descs[0], descs[1]);
 	tmp_desc = _mm_unpackhi_epi32(descs[2], descs[3]);
 	tmp_desc = _mm_unpacklo_epi64(flags, tmp_desc);
-	tmp_desc = _mm_and_si128(flags, desc_mask);
+	tmp_desc = _mm_and_si128(tmp_desc, desc_mask);
 
 	/* checksum flags */
 	tmp_desc = _mm_srli_epi32(tmp_desc, 4);