diff mbox series

[v1] lib/rcu: use rte atomic thread fence wrapper instead

Message ID 20201221073848.22366-1-joyce.kong@arm.com (mailing list archive)
State Accepted, archived
Delegated to: David Marchand
Headers show
Series [v1] lib/rcu: use rte atomic thread fence wrapper instead | expand

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/iol-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/checkpatch success coding style OK

Commit Message

Joyce Kong Dec. 21, 2020, 7:38 a.m. UTC
Use rte_atomic_thread_fence wrapper which has been provided for
__atomic_thread_fence builtins to support optimized code for
__ATOMIC_SEQ_CST memory order on x86 platforms.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
---
 lib/librte_rcu/rte_rcu_qsbr.h | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

Comments

David Marchand Jan. 11, 2021, 2:41 p.m. UTC | #1
On Mon, Dec 21, 2020 at 8:40 AM Joyce Kong <joyce.kong@arm.com> wrote:
>
> Use rte_atomic_thread_fence wrapper which has been provided for
> __atomic_thread_fence builtins to support optimized code for
> __ATOMIC_SEQ_CST memory order on x86 platforms.
>
> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/lib/librte_rcu/rte_rcu_qsbr.h b/lib/librte_rcu/rte_rcu_qsbr.h
index fa2b881bd..18811c1cc 100644
--- a/lib/librte_rcu/rte_rcu_qsbr.h
+++ b/lib/librte_rcu/rte_rcu_qsbr.h
@@ -329,12 +329,7 @@  rte_rcu_qsbr_thread_online(struct rte_rcu_qsbr *v, unsigned int thread_id)
 	 * writer might not see that the reader is online, even though
 	 * the reader is referencing the shared data structure.
 	 */
-#ifdef RTE_ARCH_X86_64
-	/* rte_smp_mb() for x86 is lighter */
-	rte_smp_mb();
-#else
-	__atomic_thread_fence(__ATOMIC_SEQ_CST);
-#endif
+	rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
 }
 
 /**