diff mbox series

[4/7] net/dpaa: add check for parsing default Rx queue

Message ID 20210719135917.26241-5-hemant.agrawal@nxp.com (mailing list archive)
State Accepted, archived
Headers show
Series NXP DPAAx fixes and improvements | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Hemant Agrawal July 19, 2021, 1:59 p.m. UTC
From: Rohit Raj <rohit.raj@nxp.com>

Add check for the PCD queue from the kernel interface
for default and error queues.

Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/dpaa/base/fman/fman.c | 16 +++++++++++++++-
 drivers/bus/dpaa/include/fman.h   |  7 +++++--
 drivers/net/dpaa/dpaa_fmc.c       |  5 ++++-
 3 files changed, 24 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/bus/dpaa/base/fman/fman.c b/drivers/bus/dpaa/base/fman/fman.c
index a14004d7fc..1814372a40 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -214,7 +214,7 @@  fman_if_init(const struct device_node *dpa_node)
 	const phandle *port_cell_idx, *ext_args_cell_idx;
 	const struct device_node *parent_node_ext_args;
 	uint64_t tx_phandle_host[4] = {0};
-	uint64_t rx_phandle_host[4] = {0};
+	uint64_t rx_phandle_host[6] = {0};
 	uint64_t regs_addr_host = 0;
 	uint64_t cell_idx_host = 0;
 	uint64_t port_cell_idx_val = 0;
@@ -511,6 +511,10 @@  fman_if_init(const struct device_node *dpa_node)
 		goto err;
 	}
 
+	/* Check if "fsl,qman-frame-queues-rx" in dtb file is valid entry or
+	 * not. A valid entry contains at least 4 entries, rx_error_queue,
+	 * rx_error_queue_count, fqid_rx_def and rx_error_queue_count.
+	 */
 	assert(lenp >= (4 * sizeof(phandle)));
 
 	na = of_n_addr_cells(mac_node);
@@ -519,11 +523,21 @@  fman_if_init(const struct device_node *dpa_node)
 	rx_phandle_host[1] = of_read_number(&rx_phandle[1], na);
 	rx_phandle_host[2] = of_read_number(&rx_phandle[2], na);
 	rx_phandle_host[3] = of_read_number(&rx_phandle[3], na);
+	rx_phandle_host[4] = of_read_number(&rx_phandle[4], na);
+	rx_phandle_host[5] = of_read_number(&rx_phandle[5], na);
 
 	assert((rx_phandle_host[1] == 1) && (rx_phandle_host[3] == 1));
 	__if->__if.fqid_rx_err = rx_phandle_host[0];
 	__if->__if.fqid_rx_def = rx_phandle_host[2];
 
+	/* If there are 6 entries in "fsl,qman-frame-queues-rx" in dtb file, it
+	 * means PCD queues are also available. Hence, store that information.
+	 */
+	if (lenp == 6 * sizeof(phandle)) {
+		__if->__if.fqid_rx_pcd = rx_phandle_host[4];
+		__if->__if.fqid_rx_pcd_count = rx_phandle_host[5];
+	}
+
 	/* Extract the Tx FQIDs */
 	tx_phandle = of_get_property(dpa_node,
 				     "fsl,qman-frame-queues-tx", &lenp);
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 516c6c1515..3a6dd555a7 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -2,7 +2,7 @@ 
  *
  * Copyright 2010-2012 Freescale Semiconductor, Inc.
  * All rights reserved.
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
  *
  */
 
@@ -329,8 +329,11 @@  struct fman_if {
 	uint8_t is_shared_mac;
 	/* The hard-coded FQIDs for this interface. Note: this doesn't cover
 	 * the PCD nor the "Rx default" FQIDs, which are configured via FMC
-	 * and its XML-based configuration.
+	 * and its XML-based configuration. These values are being parsed from
+	 * kernel device tree.
 	 */
+	uint32_t fqid_rx_pcd;
+	uint32_t fqid_rx_pcd_count;
 	uint32_t fqid_rx_def;
 	uint32_t fqid_rx_err;
 	uint32_t fqid_tx_err;
diff --git a/drivers/net/dpaa/dpaa_fmc.c b/drivers/net/dpaa/dpaa_fmc.c
index 0ef3622744..5195053361 100644
--- a/drivers/net/dpaa/dpaa_fmc.c
+++ b/drivers/net/dpaa/dpaa_fmc.c
@@ -243,7 +243,10 @@  static int dpaa_port_fmc_scheme_parse(struct fman_if *fif,
 			uint32_t fqid = fmc->scheme[idx].base_fqid + i;
 			int k, found = 0;
 
-			if (fqid == fif->fqid_rx_def) {
+			if (fqid == fif->fqid_rx_def ||
+			    (fqid >= fif->fqid_rx_pcd &&
+					fqid < (fif->fqid_rx_pcd +
+						fif->fqid_rx_pcd_count))) {
 				if (fif->is_shared_mac &&
 				fmc->scheme[idx].override_storage_profile &&
 				fmc->scheme[idx].storage_profile.direct &&