[v2,2/2] net/mlx5: fix queue num in RSS desc

Message ID 20210727064620.880417-3-lmargalit@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Series net/mlx5: prevent RSS distribution by L4 proto alone |


Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/github-robot success github build: passed
ci/intel-Testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS

Commit Message

Lior Margalit July 27, 2021, 6:46 a.m. UTC
  The selection flags for the RX hash define how the received packets will
be distributed between multiple queues. 
When creating a new TIR, the queue_num is set to 1 if non of the selection 
flags is set.

Applied the same to the RSS desc before checking if it matches a cached 
TIR object to save creating a new object every time.

Fixes: fabf8a37241c ("net/mlx5: fix shared RSS action release")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
 drivers/net/mlx5/mlx5_flow_dv.c | 2 ++
 1 file changed, 2 insertions(+)


diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index fe922b6fbe..4aac69028f 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -10985,6 +10985,8 @@  flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
 	rss_desc->hash_fields = dev_flow->hash_fields;
 	rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
 	rss_desc->shared_rss = 0;
+	if (rss_desc->hash_fields == 0)
+		rss_desc->queue_num = 1;
 	*hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
 	if (!*hrxq_idx)
 		return NULL;