From patchwork Tue Jul 27 16:36:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Dumitrescu X-Patchwork-Id: 96334 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 11862A0C52; Tue, 27 Jul 2021 18:36:49 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3003D410FA; Tue, 27 Jul 2021 18:36:32 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id B2C2341136 for ; Tue, 27 Jul 2021 18:36:30 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10057"; a="273561640" X-IronPort-AV: E=Sophos;i="5.84,274,1620716400"; d="scan'208";a="273561640" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2021 09:36:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,274,1620716400"; d="scan'208";a="517018303" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by fmsmga002.fm.intel.com with ESMTP; 27 Jul 2021 09:36:14 -0700 From: Cristian Dumitrescu To: dev@dpdk.org Date: Tue, 27 Jul 2021 17:36:09 +0100 Message-Id: <20210727163609.97769-5-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210727163609.97769-1-cristian.dumitrescu@intel.com> References: <20210727163609.97769-1-cristian.dumitrescu@intel.com> Subject: [dpdk-dev] [PATCH 5/5] examples/pipeline: add variable size headers example X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Added the files to illustrate the variable size header usage. Signed-off-by: Cristian Dumitrescu --- examples/pipeline/examples/varbit.cli | 35 ++++++++++ examples/pipeline/examples/varbit.spec | 95 ++++++++++++++++++++++++++ 2 files changed, 130 insertions(+) create mode 100644 examples/pipeline/examples/varbit.cli create mode 100644 examples/pipeline/examples/varbit.spec diff --git a/examples/pipeline/examples/varbit.cli b/examples/pipeline/examples/varbit.cli new file mode 100644 index 0000000000..0589e32c15 --- /dev/null +++ b/examples/pipeline/examples/varbit.cli @@ -0,0 +1,35 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2020 Intel Corporation + +; +; Customize the LINK parameters to match your setup. +; +mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0 + +link LINK0 dev 0000:18:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +link LINK1 dev 0000:18:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +link LINK2 dev 0000:3b:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on +link LINK3 dev 0000:3b:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on + +; +; PIPELINE0 setup. +; +pipeline PIPELINE0 create 0 + +pipeline PIPELINE0 port in 0 link LINK0 rxq 0 bsz 32 +pipeline PIPELINE0 port in 1 link LINK1 rxq 0 bsz 32 +pipeline PIPELINE0 port in 2 link LINK2 rxq 0 bsz 32 +pipeline PIPELINE0 port in 3 link LINK3 rxq 0 bsz 32 + +pipeline PIPELINE0 port out 0 link LINK0 txq 0 bsz 32 +pipeline PIPELINE0 port out 1 link LINK1 txq 0 bsz 32 +pipeline PIPELINE0 port out 2 link LINK2 txq 0 bsz 32 +pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 32 +pipeline PIPELINE0 port out 4 sink none + +pipeline PIPELINE0 build ./examples/pipeline/examples/varbit.spec + +; +; Pipelines-to-threads mapping. +; +thread 1 pipeline PIPELINE0 enable diff --git a/examples/pipeline/examples/varbit.spec b/examples/pipeline/examples/varbit.spec new file mode 100644 index 0000000000..cd49403fa9 --- /dev/null +++ b/examples/pipeline/examples/varbit.spec @@ -0,0 +1,95 @@ +; SPDX-License-Identifier: BSD-3-Clause +; Copyright(c) 2020 Intel Corporation + +; This simple example illustrates how to work with variable size headers. The assumed input packet +; is Ethernet/IPv4/UDP, with the IPv4 header containing between 0 and 40 bytes of options. To locate +; the start of the UDP header, the size of the IPv4 header needs to be detected first, which is done +; by reading the first byte of the IPv4 header that carries the 4-bit Internet Header Length (IHL) +; field; this read is done with the "lookahead" instruction, which does not advance the extract +; pointer within the input packet buffer. Once the size of the IPv4 header options is known for the +; current packet, the IPv4 header is extracted by using the two-argument "extract" instruction. Then +; the UDP header is extracted and modified. + +// +// Headers +// +struct ethernet_h { + bit<48> dst_addr + bit<48> src_addr + bit<16> ethertype +} + +struct ipv4_top_h { + bit<8> ver_ihl +} + +struct ipv4_h { + bit<8> ver_ihl + bit<8> diffserv + bit<16> total_len + bit<16> identification + bit<16> flags_offset + bit<8> ttl + bit<8> protocol + bit<16> hdr_checksum + bit<32> src_addr + bit<32> dst_addr + varbit<320> options +} + +struct udp_h { + bit<16> src_port + bit<16> dst_port + bit<16> length + bit<16> checksum +} + +header ethernet instanceof ethernet_h +header ipv4_top instanceof ipv4_top_h +header ipv4 instanceof ipv4_h +header udp instanceof udp_h + +// +// Meta-data +// +struct metadata_t { + bit<32> port + bit<32> options_size +} + +metadata instanceof metadata_t + +// +// Pipeline. +// +apply { + rx m.port + + // Extract the fixed size Ethernet header. + extract h.ethernet + + // Extract the variable size IPv4 header with up to 10 options. + lookahead h.ipv4_top + mov m.options_size h.ipv4_top.ver_ihl + and m.options_size 0xF + sub m.options_size 5 + shl m.options_size 2 + extract h.ipv4 m.options_size + + // Extract the fixed size UDP header. + extract h.udp + + // Modify the UDP header. + mov h.udp.src_port 0xAABB + mov h.udp.dst_port 0xCCDD + + // Decide the output port. + xor m.port 1 + + // Emit the Ethernet, IPv4 and UDP headers. + emit h.ethernet + emit h.ipv4 + emit h.udp + + tx m.port +}