From patchwork Mon Aug 2 10:18:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joyce Kong X-Patchwork-Id: 96525 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7A08FA0C41; Mon, 2 Aug 2021 12:21:00 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 65FD441137; Mon, 2 Aug 2021 12:21:00 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id 297BB40140 for ; Mon, 2 Aug 2021 12:20:59 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98C21D6E; Mon, 2 Aug 2021 03:20:58 -0700 (PDT) Received: from net-arm-n1sdp.shanghai.arm.com (net-arm-n1sdp.shanghai.arm.com [10.169.208.222]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DFFBB3F70D; Mon, 2 Aug 2021 03:20:51 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, david.marchand@redhat.com, honnappa.nagarahalli@arm.com, ruifeng.wang@arm.com, konstantin.ananyev@intel.com, rsanford@akamai.com, erik.g.carrillo@intel.com, olivier.matz@6wind.com, yipeng1.wang@intel.com, sameh.gobriel@intel.com, bruce.richardson@intel.com, vladimir.medvedkin@intel.com, anatoly.burakov@intel.com, andrew.rybchenko@oktetlabs.ru, jerinj@marvell.com, declan.doherty@intel.com, ciara.power@intel.com, xiaoyun.li@intel.com, nicolas.chautru@intel.com, maryam.tahhan@intel.com, reshma.pattan@intel.com, cristian.dumitrescu@intel.com Cc: dev@dpdk.org, nd@arm.com Date: Mon, 2 Aug 2021 05:18:44 -0500 Message-Id: <20210802101847.3462-10-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210802101847.3462-1-joyce.kong@arm.com> References: <20210802101847.3462-1-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v1 09/12] app/compress: use compiler atomic builtins for display sync X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Convert rte_atomic_test_and_set usage to compiler atomic CAS operation for display sync. Signed-off-by: Joyce Kong Reviewed-by: Ruifeng Wang --- app/test-compress-perf/comp_perf_test_common.h | 2 +- app/test-compress-perf/comp_perf_test_cyclecount.c | 10 +++++++--- app/test-compress-perf/comp_perf_test_throughput.c | 11 ++++++++--- app/test-compress-perf/comp_perf_test_verify.c | 6 ++++-- 4 files changed, 20 insertions(+), 9 deletions(-) diff --git a/app/test-compress-perf/comp_perf_test_common.h b/app/test-compress-perf/comp_perf_test_common.h index 72705c6a2b..d039e5a29a 100644 --- a/app/test-compress-perf/comp_perf_test_common.h +++ b/app/test-compress-perf/comp_perf_test_common.h @@ -14,7 +14,7 @@ struct cperf_mem_resources { uint16_t qp_id; uint8_t lcore_id; - rte_atomic16_t print_info_once; + uint16_t print_info_once; uint32_t total_bufs; uint8_t *compressed_data; diff --git a/app/test-compress-perf/comp_perf_test_cyclecount.c b/app/test-compress-perf/comp_perf_test_cyclecount.c index 55559a7d5a..e002e53bdf 100644 --- a/app/test-compress-perf/comp_perf_test_cyclecount.c +++ b/app/test-compress-perf/comp_perf_test_cyclecount.c @@ -468,7 +468,7 @@ cperf_cyclecount_test_runner(void *test_ctx) struct cperf_cyclecount_ctx *ctx = test_ctx; struct comp_test_data *test_data = ctx->ver.options; uint32_t lcore = rte_lcore_id(); - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; static rte_spinlock_t print_spinlock; int i; @@ -488,10 +488,12 @@ cperf_cyclecount_test_runner(void *test_ctx) ctx->ver.mem.lcore_id = lcore; + uint16_t exp = 0; /* * printing information about current compression thread */ - if (rte_atomic16_test_and_set(&ctx->ver.mem.print_info_once)) + if (__atomic_compare_exchange_n(&ctx->ver.mem.print_info_once, &exp, + 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf(" lcore: %u," " driver name: %s," " device name: %s," @@ -547,8 +549,10 @@ cperf_cyclecount_test_runner(void *test_ctx) duration_setup_per_op = ctx->duration_op / (ctx->ver.mem.total_bufs * test_data->num_iter); + exp = 0; /* R E P O R T processing */ - if (rte_atomic16_test_and_set(&display_once)) { + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) { rte_spinlock_lock(&print_spinlock); diff --git a/app/test-compress-perf/comp_perf_test_throughput.c b/app/test-compress-perf/comp_perf_test_throughput.c index 13922b658c..f587ad2ec3 100644 --- a/app/test-compress-perf/comp_perf_test_throughput.c +++ b/app/test-compress-perf/comp_perf_test_throughput.c @@ -329,15 +329,18 @@ cperf_throughput_test_runner(void *test_ctx) struct cperf_benchmark_ctx *ctx = test_ctx; struct comp_test_data *test_data = ctx->ver.options; uint32_t lcore = rte_lcore_id(); - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; int i, ret = EXIT_SUCCESS; ctx->ver.mem.lcore_id = lcore; + uint16_t exp = 0; /* * printing information about current compression thread */ - if (rte_atomic16_test_and_set(&ctx->ver.mem.print_info_once)) + if (__atomic_compare_exchange_n(&ctx->ver.mem.print_info_once, &exp, + 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED)) + printf(" lcore: %u," " driver name: %s," " device name: %s," @@ -391,7 +394,9 @@ cperf_throughput_test_runner(void *test_ctx) ctx->decomp_gbps = rte_get_tsc_hz() / ctx->decomp_tsc_byte * 8 / 1000000000; - if (rte_atomic16_test_and_set(&display_once)) { + exp = 0; + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) { printf("\n%12s%6s%12s%17s%15s%16s\n", "lcore id", "Level", "Comp size", "Comp ratio [%]", "Comp [Gbps]", "Decomp [Gbps]"); diff --git a/app/test-compress-perf/comp_perf_test_verify.c b/app/test-compress-perf/comp_perf_test_verify.c index 5e13257b79..6a2497985b 100644 --- a/app/test-compress-perf/comp_perf_test_verify.c +++ b/app/test-compress-perf/comp_perf_test_verify.c @@ -388,7 +388,7 @@ cperf_verify_test_runner(void *test_ctx) struct cperf_verify_ctx *ctx = test_ctx; struct comp_test_data *test_data = ctx->options; int ret = EXIT_SUCCESS; - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; uint32_t lcore = rte_lcore_id(); ctx->mem.lcore_id = lcore; @@ -428,7 +428,9 @@ cperf_verify_test_runner(void *test_ctx) test_data->input_data_sz * 100; if (!ctx->silent) { - if (rte_atomic16_test_and_set(&display_once)) { + uint16_t exp = 0; + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) { printf("%12s%6s%12s%17s\n", "lcore id", "Level", "Comp size", "Comp ratio [%]"); }