From patchwork Thu Sep 2 13:42:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archana Muniganti X-Patchwork-Id: 97811 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9377FA0C4C; Thu, 2 Sep 2021 15:43:56 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8036740686; Thu, 2 Sep 2021 15:43:56 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 0DA824067E for ; Thu, 2 Sep 2021 15:43:54 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1825LHBn028347 for ; Thu, 2 Sep 2021 06:43:54 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=LFlhFZbQoGNXDwPk5KwfIL1Ni0BF846rGNBcmd3/pCc=; b=PWqUEcbBpHruABXm7DS5tIpHrSLXRHVMlyAFQvz2rJqGr3t8XIJocs9XxR20KMOdfHTO mmK8V2xXbr55qb1XxckVXLJqk31ZzN7T5XNkdEMAxfeoK4hUb9y9sy0oI1egaHOdbJEn 8YDbhL9nOToqKPTCX8hqi7rs7QmRYIkotSYX5uGBrd8A6WE1moy3ok146B8YA4xqb5b5 F/LEa/CeTLjAPI+Q4IwnnL5k0qwSSVSw8NctO0QYjC3zBJBJyqMbXMlppmZmg6bE1ZJk YDUowqDLOx4NqGmkpE3oElIA9dm4TsZhW7UmcRLvgnzB4Y4ayMSsQ6TFCHWhvYjW8d9Y yw== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 3atrd2hryp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 02 Sep 2021 06:43:54 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 2 Sep 2021 06:43:52 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 2 Sep 2021 06:43:52 -0700 Received: from hyd1409.caveonetworks.com.com (unknown [10.29.45.15]) by maili.marvell.com (Postfix) with ESMTP id 4FA9D3F7064; Thu, 2 Sep 2021 06:43:50 -0700 (PDT) From: Archana Muniganti To: CC: Archana Muniganti , , , , , , Vamsi Attunuru Date: Thu, 2 Sep 2021 19:12:48 +0530 Message-ID: <20210902134254.28373-3-marchana@marvell.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20210902134254.28373-1-marchana@marvell.com> References: <20210902134254.28373-1-marchana@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: hOVsIMHEbOxiM4soMbM0CDJIncOsntLG X-Proofpoint-ORIG-GUID: hOVsIMHEbOxiM4soMbM0CDJIncOsntLG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-02_04,2021-09-02_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH 2/8] common/cnxk: add cn9k IPsec microcode defines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Microcode IE opcodes support IPsec operations. Add defines and structs defined by microcode. Signed-off-by: Ankur Dwivedi Signed-off-by: Archana Muniganti Signed-off-by: Tejasree Kondoj Signed-off-by: Vamsi Attunuru --- drivers/common/cnxk/roc_cpt.h | 1 + drivers/common/cnxk/roc_ie_on.h | 158 ++++++++++++++++++++++++++++++-- 2 files changed, 150 insertions(+), 9 deletions(-) diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index f0f505a8c2..9e63073a52 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -47,6 +47,7 @@ #define ROC_CPT_AES_GCM_MAC_LEN 16 #define ROC_CPT_AES_CBC_IV_LEN 16 #define ROC_CPT_SHA1_HMAC_LEN 12 +#define ROC_CPT_SHA2_HMAC_LEN 16 #define ROC_CPT_AUTH_KEY_LEN_MAX 64 #define ROC_CPT_DES3_KEY_LEN 24 diff --git a/drivers/common/cnxk/roc_ie_on.h b/drivers/common/cnxk/roc_ie_on.h index 222c298a53..7b4983ca8a 100644 --- a/drivers/common/cnxk/roc_ie_on.h +++ b/drivers/common/cnxk/roc_ie_on.h @@ -5,18 +5,24 @@ #ifndef __ROC_IE_ON_H__ #define __ROC_IE_ON_H__ -/* CN9K IPSEC LA opcodes */ -#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_OUTBOUND 0x20 -#define ROC_IE_ONL_MAJOR_OP_WRITE_IPSEC_INBOUND 0x21 -#define ROC_IE_ONL_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23 -#define ROC_IE_ONL_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x24 +/* CN9K IPsec LA */ -/* CN9K IPSEC FP opcodes */ -#define ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x25UL -#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL +/* CN9K IPsec LA opcodes */ +#define ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_OUTBOUND 0x20 +#define ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND 0x21 +#define ROC_IE_ON_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x23 +#define ROC_IE_ON_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x24 /* Ucode completion codes */ -#define ROC_IE_ONF_UCC_SUCCESS 0 +enum roc_ie_on_ucc_ipsec { + ROC_IE_ON_UCC_SUCCESS = 0, + ROC_IE_ON_AUTH_UNSUPPORTED = 0xB0, + ROC_IE_ON_ENCRYPT_UNSUPPORTED = 0xB1, +}; + +/* Helper macros */ +#define ROC_IE_ON_PER_PKT_IV BIT(11) +#define ROC_IE_ON_INB_RPTR_HDR 0x8 enum { ROC_IE_ON_SA_ENC_NULL = 0, @@ -50,6 +56,140 @@ enum { ROC_IE_ON_SA_ENCAP_UDP = 1, }; +struct roc_ie_on_outb_hdr { + uint32_t ip_id; + uint32_t seq; + uint8_t iv[16]; +}; + +union roc_ie_on_bit_perfect_iv { + uint8_t aes_iv[16]; + uint8_t des_iv[8]; + struct { + uint8_t nonce[4]; + uint8_t iv[8]; + uint8_t counter[4]; + } gcm; +}; + +struct roc_ie_on_traffic_selector { + uint16_t src_port[2]; + uint16_t dst_port[2]; + union { + struct { + uint32_t src_addr[2]; + uint32_t dst_addr[2]; + } ipv4; + struct { + uint8_t src_addr[32]; + uint8_t dst_addr[32]; + } ipv6; + }; +}; + +struct roc_ie_on_ip_template { + union { + struct { + uint8_t ipv4_hdr[20]; + uint16_t udp_src; + uint16_t udp_dst; + } ip4; + struct { + uint8_t ipv6_hdr[40]; + uint16_t udp_src; + uint16_t udp_dst; + } ip6; + }; +}; + +struct roc_ie_on_sa_ctl { + uint64_t spi : 32; + uint64_t exp_proto_inter_frag : 8; + uint64_t copy_df : 1; + uint64_t frag_type : 1; + uint64_t explicit_iv_en : 1; + uint64_t esn_en : 1; + uint64_t rsvd_45_44 : 2; + uint64_t encap_type : 2; + uint64_t enc_type : 3; + uint64_t rsvd_48 : 1; + uint64_t auth_type : 4; + uint64_t valid : 1; + uint64_t direction : 1; + uint64_t outer_ip_ver : 1; + uint64_t inner_ip_ver : 1; + uint64_t ipsec_mode : 1; + uint64_t ipsec_proto : 1; + uint64_t aes_key_len : 2; +}; + +struct roc_ie_on_common_sa { + /* w0 */ + struct roc_ie_on_sa_ctl ctl; + + /* w1-w4 */ + uint8_t cipher_key[32]; + + /* w5-w6 */ + union roc_ie_on_bit_perfect_iv iv; + + /* w7 */ + uint32_t esn_hi; + uint32_t esn_low; +}; + +struct roc_ie_on_outb_sa { + /* w0 - w7 */ + struct roc_ie_on_common_sa common_sa; + + /* w8-w55 */ + union { + struct { + struct roc_ie_on_ip_template template; + } aes_gcm; + struct { + uint8_t hmac_key[24]; + uint8_t unused[24]; + struct roc_ie_on_ip_template template; + } sha1; + struct { + uint8_t hmac_key[64]; + uint8_t hmac_iv[64]; + struct roc_ie_on_ip_template template; + } sha2; + }; +}; + +struct roc_ie_on_inb_sa { + /* w0 - w7 */ + struct roc_ie_on_common_sa common_sa; + + /* w8 */ + uint8_t udp_encap[8]; + + /* w9-w33 */ + union { + struct { + uint8_t hmac_key[48]; + struct roc_ie_on_traffic_selector selector; + } sha1_or_gcm; + struct { + uint8_t hmac_key[64]; + uint8_t hmac_iv[64]; + struct roc_ie_on_traffic_selector selector; + } sha2; + }; +}; + +/* CN9K IPsec FP */ + +/* CN9K IPsec FP opcodes */ +#define ROC_IE_ONF_MAJOR_OP_PROCESS_OUTBOUND_IPSEC 0x25UL +#define ROC_IE_ONF_MAJOR_OP_PROCESS_INBOUND_IPSEC 0x26UL + +/* Ucode completion codes */ +#define ROC_IE_ONF_UCC_SUCCESS 0 + struct roc_ie_onf_sa_ctl { uint32_t spi; uint64_t exp_proto_inter_frag : 8;