From patchwork Mon Sep 6 07:54:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 98057 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9932AA0C4D; Mon, 6 Sep 2021 09:56:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5E2424117D; Mon, 6 Sep 2021 09:55:44 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id F3C5E41178 for ; Mon, 6 Sep 2021 09:55:42 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 185MxZEO021315 for ; Mon, 6 Sep 2021 00:55:42 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=XeOCHFcgG/T2covuFkYFH0JS+ygiOQDv52TvZiLOoJQ=; b=Mz0YcncFbpSrcbPpn7BMddB8vkKgEH+qGxui12CWwRs6lY581ykxLQYwJiQsssVAOYAO xILFjkyYSyWOy7I1os067ycij7CvnzuqV1S2Utuy6tbb+aCBOdT3p9Hz5m0039K2B3Zf TTY7+4+qwSraALFi5d+RkKYbsPUy5ds8fI+QrEQ2twWM7QQNdOLtOMkTKYWmwg7DMWBP 0wn7eEJwkiE+sxsJDz3wJolxpppUxA6jwadesuRYfVd7ztk2vM+HBRdkBCP5cflT8Cm4 W8OmBIMo+nNkbyqzTx6nM8tKESJWfl0N0NDpWyCrawZrKByKgDjND+nCPsIwceO4z/ma +A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3aw2sp1spb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 06 Sep 2021 00:55:42 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 6 Sep 2021 00:55:40 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 6 Sep 2021 00:55:40 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id E79FC3F709E; Mon, 6 Sep 2021 00:55:38 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: Date: Mon, 6 Sep 2021 13:24:43 +0530 Message-ID: <20210906075450.1452123-20-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210906075450.1452123-1-skori@marvell.com> References: <20210906075450.1452123-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: OZ2IsLlXKnt8N8j49xDJ8ylLeoxSrTPY X-Proofpoint-ORIG-GUID: OZ2IsLlXKnt8N8j49xDJ8ylLeoxSrTPY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 20/27] net/cnxk: support ops to create meter policy X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement API to add meter policy for CN10K platform. Signed-off-by: Sunil Kumar Kori --- drivers/net/cnxk/cn10k_ethdev_mtr.c | 47 +++++++++++++++++++++++++++++ drivers/net/cnxk/cnxk_ethdev.h | 12 ++++++++ 2 files changed, 59 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c index 8374f40681..854d30dc20 100644 --- a/drivers/net/cnxk/cn10k_ethdev_mtr.c +++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c @@ -50,6 +50,18 @@ nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id) return NULL; } +static struct cn10k_flow_meter_policy * +nix_mtr_policy_find(struct cnxk_eth_dev *dev, uint32_t meter_policy_id) +{ + struct cn10k_mtr_policy *fmps = &dev->mtr_policy; + struct cn10k_flow_meter_policy *fmp; + + TAILQ_FOREACH(fmp, fmps, next) + if (meter_policy_id == fmp->id) + return fmp; + return NULL; +} + static int nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id, struct rte_mtr_meter_profile *profile, @@ -246,11 +258,46 @@ cn10k_nix_mtr_policy_validate(struct rte_eth_dev *dev, return 0; } +static int +cn10k_nix_mtr_policy_add(struct rte_eth_dev *eth_dev, uint32_t policy_id, + struct rte_mtr_meter_policy_params *policy, + struct rte_mtr_error *error) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + struct cn10k_mtr_policy *fmps = &dev->mtr_policy; + struct cn10k_flow_meter_policy *fmp; + int rc; + + fmp = nix_mtr_policy_find(dev, policy_id); + if (fmp) { + plt_info("Policy already exist"); + return 0; + } + + fmp = plt_zmalloc(sizeof(struct cn10k_flow_meter_policy), ROC_ALIGN); + if (fmp == NULL) { + return -rte_mtr_error_set(error, ENOMEM, + RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL, + "Memory allocation failure"); + } else { + rc = cn10k_nix_mtr_policy_validate(eth_dev, policy, error); + if (rc) + return rc; + } + + fmp->id = policy_id; + fmp->policy = *policy; + TAILQ_INSERT_TAIL(fmps, fmp, next); + + return 0; +} + const struct rte_mtr_ops nix_mtr_ops = { .capabilities_get = cn10k_nix_mtr_capabilities_get, .meter_profile_add = cn10k_nix_mtr_profile_add, .meter_profile_delete = cn10k_nix_mtr_profile_delete, .meter_policy_validate = cn10k_nix_mtr_policy_validate, + .meter_policy_add = cn10k_nix_mtr_policy_add, }; int diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 5d7cf58a24..3811360b75 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -145,6 +145,16 @@ struct cnxk_timesync_info { uint64_t *tx_tstamp; } __plt_cache_aligned; + +struct cn10k_flow_meter_policy { + TAILQ_ENTRY(cn10k_flow_meter_policy) next; + /**< Pointer to the next flow meter structure. */ + uint32_t id; /**< Policy id */ + uint32_t mtr_id; /** Meter id */ + struct rte_mtr_meter_policy_params policy; + uint32_t ref_cnt; +}; + struct cn10k_flow_meter_profile { TAILQ_ENTRY(cn10k_flow_meter_profile) next; struct rte_mtr_meter_profile profile; /**< Profile detail. */ @@ -153,6 +163,7 @@ struct cn10k_flow_meter_profile { }; TAILQ_HEAD(cn10k_mtr_profiles, cn10k_flow_meter_profile); +TAILQ_HEAD(cn10k_mtr_policy, cn10k_flow_meter_policy); struct cnxk_eth_dev { /* ROC NIX */ @@ -223,6 +234,7 @@ struct cnxk_eth_dev { /* Ingress policer */ struct cn10k_mtr_profiles mtr_profiles; + struct cn10k_mtr_policy mtr_policy; /* Rx burst for cleanup(Only Primary) */ eth_rx_burst_t rx_pkt_burst_no_offload;