[v3] net/ice: refine flow priority support in PF
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Commit Message
The usage of priority is converse in pipeline mode and
non-pipeline mode. Refine attribute priority support of flow
filter in PF driver. When priority is 0, rules are created in
switch filter first and FDIR is used as backup. When priority
is 1, rules are all created in switch filter. Other filters
don't support priority 1. Value 0 denotes higher priority.
Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
---
v3:
* Fix priority issue of FDIR in pipeline mode. Refine the priority validation.
v2:
* Replace magic number with marco and add comments to explain the calculation.
---
drivers/net/ice/ice_acl_filter.c | 5 ++++-
drivers/net/ice/ice_fdir_filter.c | 6 +++++-
drivers/net/ice/ice_generic_flow.c | 4 ++--
drivers/net/ice/ice_hash.c | 5 ++++-
drivers/net/ice/ice_switch_filter.c | 11 +++++++++--
5 files changed, 24 insertions(+), 7 deletions(-)
Comments
> -----Original Message-----
> From: Zhang, Yuying <yuying.zhang@intel.com>
> Sent: Wednesday, September 8, 2021 12:58 PM
> To: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: Zhang, Yuying <yuying.zhang@intel.com>
> Subject: [PATCH v3] net/ice: refine flow priority support in PF
>
> The usage of priority is converse in pipeline mode and non-pipeline mode.
> Refine attribute priority support of flow filter in PF driver. When priority is 0,
> rules are created in switch filter first and FDIR is used as backup. When priority
> is 1, rules are all created in switch filter. Other filters don't support priority 1.
> Value 0 denotes higher priority.
>
> Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
On 9/8/2021 5:58 AM, Yuying Zhang wrote:
> The usage of priority is converse in pipeline mode and
> non-pipeline mode. Refine attribute priority support of flow
> filter in PF driver. When priority is 0, rules are created in
> switch filter first and FDIR is used as backup. When priority
> is 1, rules are all created in switch filter. Other filters
> don't support priority 1. Value 0 denotes higher priority.
>
Hi Yuying,
Can you please describe the impact of the change more?
Was the usage of the priority wrong either in pipeline or non-pipeline mode
previously?
If so this is a fix patch and we need fixes line, and consider backporting options.
And what is the impact to the user, if we don't have this patch, what user
observes? And what is changed for user after this patch?
> Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
> ---
> v3:
> * Fix priority issue of FDIR in pipeline mode. Refine the priority validation.
> v2:
> * Replace magic number with marco and add comments to explain the calculation.
> ---
> drivers/net/ice/ice_acl_filter.c | 5 ++++-
> drivers/net/ice/ice_fdir_filter.c | 6 +++++-
> drivers/net/ice/ice_generic_flow.c | 4 ++--
> drivers/net/ice/ice_hash.c | 5 ++++-
> drivers/net/ice/ice_switch_filter.c | 11 +++++++++--
> 5 files changed, 24 insertions(+), 7 deletions(-)
<...>
@@ -904,7 +904,7 @@ ice_acl_parse(struct ice_adapter *ad,
uint32_t array_len,
const struct rte_flow_item pattern[],
const struct rte_flow_action actions[],
- uint32_t priority __rte_unused,
+ uint32_t priority,
void **meta,
struct rte_flow_error *error)
{
@@ -914,6 +914,9 @@ ice_acl_parse(struct ice_adapter *ad,
uint64_t input_set;
int ret;
+ if (priority >= 1)
+ return -rte_errno;
+
memset(filter, 0, sizeof(*filter));
item = ice_search_pattern_match_item(ad, pattern, array, array_len,
error);
@@ -2194,7 +2194,7 @@ ice_fdir_parse(struct ice_adapter *ad,
uint32_t array_len,
const struct rte_flow_item pattern[],
const struct rte_flow_action actions[],
- uint32_t priority __rte_unused,
+ uint32_t priority,
void **meta,
struct rte_flow_error *error)
{
@@ -2207,6 +2207,10 @@ ice_fdir_parse(struct ice_adapter *ad,
memset(filter, 0, sizeof(*filter));
item = ice_search_pattern_match_item(ad, pattern, array, array_len,
error);
+
+ if (!ad->devargs.pipe_mode_support && priority >= 1)
+ return -rte_errno;
+
if (!item)
return -rte_errno;
@@ -1923,9 +1923,9 @@ ice_register_parser(struct ice_flow_parser *parser,
} else {
if (parser->engine->type == ICE_FLOW_ENGINE_SWITCH ||
parser->engine->type == ICE_FLOW_ENGINE_HASH)
- TAILQ_INSERT_TAIL(list, parser_node, node);
- else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
TAILQ_INSERT_HEAD(list, parser_node, node);
+ else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR)
+ TAILQ_INSERT_TAIL(list, parser_node, node);
else if (parser->engine->type == ICE_FLOW_ENGINE_ACL)
TAILQ_INSERT_HEAD(list, parser_node, node);
else
@@ -1034,7 +1034,7 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad,
uint32_t array_len,
const struct rte_flow_item pattern[],
const struct rte_flow_action actions[],
- uint32_t priority __rte_unused,
+ uint32_t priority,
void **meta,
struct rte_flow_error *error)
{
@@ -1043,6 +1043,9 @@ ice_hash_parse_pattern_action(__rte_unused struct ice_adapter *ad,
struct ice_rss_meta *rss_meta_ptr;
uint64_t phint = ICE_PHINT_NONE;
+ if (priority >= 1)
+ return -rte_errno;
+
rss_meta_ptr = rte_zmalloc(NULL, sizeof(*rss_meta_ptr), 0);
if (!rss_meta_ptr) {
rte_flow_error_set(error, EINVAL,
@@ -31,6 +31,7 @@
#define ICE_PPP_IPV4_PROTO 0x0021
#define ICE_PPP_IPV6_PROTO 0x0057
#define ICE_IPV4_PROTO_NVGRE 0x002F
+#define ICE_SW_PRI_BASE 6
#define ICE_SW_INSET_ETHER ( \
ICE_INSET_DMAC | ICE_INSET_SMAC | ICE_INSET_ETHERTYPE)
@@ -1572,7 +1573,10 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,
rule_info->sw_act.src = rule_info->sw_act.vsi_handle;
rule_info->sw_act.flag = ICE_FLTR_RX;
rule_info->rx = 1;
- rule_info->priority = 6 - priority;
+ /* 0 denotes lowest priority of recipe and highest priority
+ * of rte_flow. Change rte_flow priority into recipe priority.
+ */
+ rule_info->priority = ICE_SW_PRI_BASE - priority;
return 0;
}
@@ -1651,7 +1655,10 @@ ice_switch_parse_action(struct ice_pf *pf,
rule_info->sw_act.vsi_handle = vsi->idx;
rule_info->rx = 1;
rule_info->sw_act.src = vsi->idx;
- rule_info->priority = priority + 5;
+ /* 0 denotes lowest priority of recipe and highest priority
+ * of rte_flow. Change rte_flow priority into recipe priority.
+ */
+ rule_info->priority = ICE_SW_PRI_BASE - priority;
return 0;