diff mbox series

[RFC,06/10] crypto/mlx5: use OS agnostic functions for UMEM operations

Message ID 20210914053833.7760-7-talshn@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series Support MLX5 crypto driver on Windows |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tal Shnaiderman Sept. 14, 2021, 5:38 a.m. UTC 
  use the functions mlx5_os_umem_reg, mlx5_os_umem_dereg
mlx5_os_get_umem_id instead of the glue functions to support
UMEM operations on all OSs.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
---
 drivers/crypto/mlx5/mlx5_crypto.c | 14 +++++++-------
 drivers/crypto/mlx5/mlx5_crypto.h |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index 3dac69f860..ccae113770 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -261,7 +261,7 @@  mlx5_crypto_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id)
 	if (qp->qp_obj != NULL)
 		claim_zero(mlx5_devx_cmd_destroy(qp->qp_obj));
 	if (qp->umem_obj != NULL)
-		claim_zero(mlx5_glue->devx_umem_dereg(qp->umem_obj));
+		claim_zero(mlx5_os_umem_dereg(qp->umem_obj));
 	if (qp->umem_buf != NULL)
 		rte_free(qp->umem_buf);
 	mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh);
@@ -682,10 +682,10 @@  mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		rte_errno = ENOMEM;
 		goto error;
 	}
-	qp->umem_obj = mlx5_glue->devx_umem_reg(priv->ctx,
-					       (void *)(uintptr_t)qp->umem_buf,
-					       umem_size,
-					       IBV_ACCESS_LOCAL_WRITE);
+	qp->umem_obj = mlx5_os_umem_reg(priv->ctx,
+					(void *)(uintptr_t)qp->umem_buf,
+					umem_size,
+					IBV_ACCESS_LOCAL_WRITE);
 	if (qp->umem_obj == NULL) {
 		DRV_LOG(ERR, "Failed to register QP umem.");
 		goto error;
@@ -705,9 +705,9 @@  mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	attr.rq_size =  0;
 	attr.sq_size = RTE_BIT32(log_nb_desc);
 	attr.dbr_umem_valid = 1;
-	attr.wq_umem_id = qp->umem_obj->umem_id;
+	attr.wq_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
 	attr.wq_umem_offset = 0;
-	attr.dbr_umem_id = qp->umem_obj->umem_id;
+	attr.dbr_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
 	attr.dbr_address = RTE_BIT64(log_nb_desc) * priv->wqe_set_size;
 	qp->qp_obj = mlx5_devx_cmd_create_qp(priv->ctx, &attr);
 	if (qp->qp_obj == NULL) {
diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index d49b0001f0..d5cc509e42 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -45,7 +45,7 @@  struct mlx5_crypto_qp {
 	struct mlx5_devx_cq cq_obj;
 	struct mlx5_devx_obj *qp_obj;
 	struct rte_cryptodev_stats stats;
-	struct mlx5dv_devx_umem *umem_obj;
+	void *umem_obj;
 	void *umem_buf;
 	volatile uint32_t *db_rec;
 	struct rte_crypto_op **ops;