From patchwork Fri Sep 17 11:02:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 99120 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C35CAA0C46; Fri, 17 Sep 2021 13:00:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 981B74114E; Fri, 17 Sep 2021 12:59:56 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id 4D30B410E9 for ; Fri, 17 Sep 2021 12:59:53 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10109"; a="286458709" X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="286458709" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2021 03:59:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="699440637" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga006.fm.intel.com with ESMTP; 17 Sep 2021 03:59:51 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang Date: Fri, 17 Sep 2021 19:02:32 +0800 Message-Id: <20210917110242.3127658-11-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210917110242.3127658-1-qi.z.zhang@intel.com> References: <20210917110242.3127658-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 10/20] net/ice/base: init XLT key builder for parser X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Parse below DDP section into struct ice_xlt_kb: ICE_SID_XLT_KEY_BUILDER_SW ICE_SID_XLT_KEY_BUILDER_FD ICE_SID_XLT_KEY_BUILDER_RSS Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flex_pipe.c | 2 +- drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_parser.c | 28 ++++ drivers/net/ice/base/ice_parser.h | 9 ++ drivers/net/ice/base/ice_xlt_kb.c | 189 +++++++++++++++++++++++++++ drivers/net/ice/base/ice_xlt_kb.h | 33 +++++ drivers/net/ice/base/meson.build | 1 + 7 files changed, 264 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ice/base/ice_xlt_kb.c create mode 100644 drivers/net/ice/base/ice_xlt_kb.h diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 703c3e0416..f35d59f4f5 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -218,7 +218,7 @@ ice_pkg_advance_sect(struct ice_seg *ice_seg, struct ice_pkg_enum *state) * When the function returns a NULL pointer, then the end of the matching * sections has been reached. */ -static void * +void * ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state, u32 sect_type) { diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 045a77c607..9733c4b214 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -99,4 +99,7 @@ ice_pkg_enum_entry(struct ice_seg *ice_seg, struct ice_pkg_enum *state, u32 sect_type, u32 *offset, void *(*handler)(u32 sect_type, void *section, u32 index, u32 *offset)); +void * +ice_pkg_enum_section(struct ice_seg *ice_seg, struct ice_pkg_enum *state, + u32 sect_type); #endif /* _ICE_FLEX_PIPE_H_ */ diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c index 437dc5b8f8..0b79b62e04 100644 --- a/drivers/net/ice/base/ice_parser.c +++ b/drivers/net/ice/base/ice_parser.c @@ -245,6 +245,30 @@ enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr) goto err; } + p->xlt_kb_sw = ice_xlt_kb_get_sw(hw); + if (!p->xlt_kb_sw) { + status = ICE_ERR_PARAM; + goto err; + } + + p->xlt_kb_acl = ice_xlt_kb_get_acl(hw); + if (!p->xlt_kb_acl) { + status = ICE_ERR_PARAM; + goto err; + } + + p->xlt_kb_fd = ice_xlt_kb_get_fd(hw); + if (!p->xlt_kb_fd) { + status = ICE_ERR_PARAM; + goto err; + } + + p->xlt_kb_rss = ice_xlt_kb_get_rss(hw); + if (!p->xlt_kb_rss) { + status = ICE_ERR_PARAM; + goto err; + } + *psr = p; return ICE_SUCCESS; err: @@ -270,6 +294,10 @@ void ice_parser_destroy(struct ice_parser *psr) ice_free(psr->hw, psr->mk_grp_table); ice_free(psr->hw, psr->proto_grp_table); ice_free(psr->hw, psr->flg_rd_table); + ice_free(psr->hw, psr->xlt_kb_sw); + ice_free(psr->hw, psr->xlt_kb_acl); + ice_free(psr->hw, psr->xlt_kb_fd); + ice_free(psr->hw, psr->xlt_kb_rss); ice_free(psr->hw, psr); } diff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h index f7c3c1a318..89cd714fbd 100644 --- a/drivers/net/ice/base/ice_parser.h +++ b/drivers/net/ice/base/ice_parser.h @@ -13,6 +13,7 @@ #include "ice_mk_grp.h" #include "ice_proto_grp.h" #include "ice_flg_rd.h" +#include "ice_xlt_kb.h" struct ice_parser { struct ice_hw *hw; /* pointer to the hardware structure */ @@ -41,6 +42,14 @@ struct ice_parser { struct ice_proto_grp_item *proto_grp_table; /* load data from section ICE_SID_RXPARSER_FLAG_REDIR */ struct ice_flg_rd_item *flg_rd_table; + /* load data from section ICE_SID_XLT_KEY_BUILDER_SW */ + struct ice_xlt_kb *xlt_kb_sw; + /* load data from section ICE_SID_XLT_KEY_BUILDER_ACL */ + struct ice_xlt_kb *xlt_kb_acl; + /* load data from section ICE_SID_XLT_KEY_BUILDER_FD */ + struct ice_xlt_kb *xlt_kb_fd; + /* load data from section ICE_SID_XLT_KEY_BUILDER_RSS */ + struct ice_xlt_kb *xlt_kb_rss; }; enum ice_status ice_parser_create(struct ice_hw *hw, struct ice_parser **psr); diff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c new file mode 100644 index 0000000000..8b4043a836 --- /dev/null +++ b/drivers/net/ice/base/ice_xlt_kb.c @@ -0,0 +1,189 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2001-2021 Intel Corporation + */ + +#include "ice_common.h" + +#define ICE_XLT_KB_TBL_OFF 12 +#define ICE_XLT_KB_TBL_ENTRY_SIZE 24 + +static void _xlt_kb_entry_dump(struct ice_hw *hw, + struct ice_xlt_kb_entry *entry, int idx) +{ + int i; + + ice_info(hw, "key builder entry %d\n", idx); + ice_info(hw, "\txlt1_ad_sel = %d\n", entry->xlt1_ad_sel); + ice_info(hw, "\txlt2_ad_sel = %d\n", entry->xlt2_ad_sel); + + for (i = 0; i < ICE_XLT_KB_FLAG0_14_CNT; i++) + ice_info(hw, "\tflg%d_sel = %d\n", i, entry->flg0_14_sel[i]); + + ice_info(hw, "\txlt1_md_sel = %d\n", entry->xlt1_md_sel); + ice_info(hw, "\txlt2_md_sel = %d\n", entry->xlt2_md_sel); +} + +/** + * ice_imem_dump - dump a xlt key build info + * @ice_hw: pointer to the hardware structure + * @kb: key build to dump + */ +void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb) +{ + int i; + + ice_info(hw, "xlt1_pm = %d\n", kb->xlt1_pm); + ice_info(hw, "xlt2_pm = %d\n", kb->xlt2_pm); + ice_info(hw, "prof_id_pm = %d\n", kb->prof_id_pm); + ice_info(hw, "flag15 low = 0x%08x\n", (u32)kb->flag15); + ice_info(hw, "flag15 high = 0x%08x\n", (u32)(kb->flag15 >> 32)); + + for (i = 0; i < ICE_XLT_KB_TBL_CNT; i++) + _xlt_kb_entry_dump(hw, &kb->entries[i], i); +} + +/** The function parses a 192 bits XLT Key Build entry with below format: + * BIT 0-31: reserved + * BIT 32-34: XLT1 AdSel (entry->xlt1_ad_sel) + * BIT 35-37: XLT2 AdSel (entry->xlt2_ad_sel) + * BIT 38-46: Flag 0 Select (entry->flg0_14_sel[0]) + * BIT 47-55: Flag 1 Select (entry->flg0_14_sel[1]) + * BIT 56-64: Flag 2 Select (entry->flg0_14_sel[2]) + * BIT 65-73: Flag 3 Select (entry->flg0_14_sel[3]) + * BIT 74-82: Flag 4 Select (entry->flg0_14_sel[4]) + * BIT 83-91: Flag 5 Select (entry->flg0_14_sel[5]) + * BIT 92-100: Flag 6 Select (entry->flg0_14_sel[6]) + * BIT 101-109:Flag 7 Select (entry->flg0_14_sel[7]) + * BIT 110-118:Flag 8 Select (entry->flg0_14_sel[8]) + * BIT 119-127:Flag 9 Select (entry->flg0_14_sel[9]) + * BIT 128-136:Flag 10 Select (entry->flg0_14_sel[10]) + * BIT 137-145:Flag 11 Select (entry->flg0_14_sel[11]) + * BIT 146-154:Flag 12 Select (entry->flg0_14_sel[12]) + * BIT 155-163:Flag 13 Select (entry->flg0_14_sel[13]) + * BIT 164-172:Flag 14 Select (entry->flg0_14_sel[14]) + * BIT 173-181:reserved + * BIT 182-186:XLT1 MdSel (entry->xlt1_md_sel) + * BIT 187-191:XLT2 MdSel (entry->xlt2_md_sel) + */ +static void _kb_entry_init(struct ice_xlt_kb_entry *entry, u8 *data) +{ + u64 d64 = *(u64 *)&data[4]; + + entry->xlt1_ad_sel = (u8)(d64 & 0x7); + entry->xlt2_ad_sel = (u8)((d64 >> 3) & 0x7); + entry->flg0_14_sel[0] = (u16)((d64 >> 6) & 0x1ff); + entry->flg0_14_sel[1] = (u16)((d64 >> 15) & 0x1ff); + entry->flg0_14_sel[2] = (u16)((d64 >> 24) & 0x1ff); + entry->flg0_14_sel[3] = (u16)((d64 >> 33) & 0x1ff); + entry->flg0_14_sel[4] = (u16)((d64 >> 42) & 0x1ff); + entry->flg0_14_sel[5] = (u16)((d64 >> 51) & 0x1ff); + + d64 = (*(u64 *)&data[11] >> 4); + entry->flg0_14_sel[6] = (u16)(d64 & 0x1ff); + entry->flg0_14_sel[7] = (u16)((d64 >> 9) & 0x1ff); + entry->flg0_14_sel[8] = (u16)((d64 >> 18) & 0x1ff); + entry->flg0_14_sel[9] = (u16)((d64 >> 27) & 0x1ff); + entry->flg0_14_sel[10] = (u16)((d64 >> 36) & 0x1ff); + entry->flg0_14_sel[11] = (u16)((d64 >> 45) & 0x1ff); + + d64 = (*(u64 *)&data[18] >> 2); + entry->flg0_14_sel[12] = (u16)(d64 & 0x1ff); + entry->flg0_14_sel[13] = (u16)((d64 >> 9) & 0x1ff); + entry->flg0_14_sel[14] = (u16)((d64 >> 18) & 0x1ff); + + entry->xlt1_md_sel = (u8)((d64 >> 36) & 0x1f); + entry->xlt2_md_sel = (u8)((d64 >> 41) & 0x1f); +} + +/** The function parses a 204 bytes XLT Key Build Table with below format: + * byte 0: XLT1 Partition Mode (kb->xlt1_pm) + * byte 1: XLT2 Partition Mode (kb->xlt2_pm) + * byte 2: Profile ID Partition Mode (kb->prof_id_pm) + * byte 3: reserved + * byte 4-11: Flag15 Mask (kb->flag15) + * byte 12-203:8 Key Build entries (kb->entries) + */ +static void _parse_kb_data(struct ice_hw *hw, struct ice_xlt_kb *kb, void *data) +{ + u8 *buf = (u8 *)data; + int i; + + kb->xlt1_pm = buf[0]; + kb->xlt2_pm = buf[1]; + kb->prof_id_pm = buf[2]; + + kb->flag15 = *(u64 *)&buf[4]; + for (i = 0; i < ICE_XLT_KB_TBL_CNT; i++) + _kb_entry_init(&kb->entries[i], + &buf[ICE_XLT_KB_TBL_OFF + + i * ICE_XLT_KB_TBL_ENTRY_SIZE]); + + if (hw->debug_mask & ICE_DBG_PARSER) + ice_xlt_kb_dump(hw, kb); +} + +static struct ice_xlt_kb *_xlt_kb_get(struct ice_hw *hw, u32 sect_type) +{ + struct ice_seg *seg = hw->seg; + struct ice_pkg_enum state; + struct ice_xlt_kb *kb; + void *data; + + if (!seg) + return NULL; + + kb = (struct ice_xlt_kb *)ice_malloc(hw, sizeof(*kb)); + if (!kb) { + ice_debug(hw, ICE_DBG_PARSER, "failed to allocate memory for xlt key builder type %d.\n", + sect_type); + return NULL; + } + + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + data = ice_pkg_enum_section(seg, &state, sect_type); + if (!data) { + ice_debug(hw, ICE_DBG_PARSER, "failed to find section type %d.\n", + sect_type); + return NULL; + } + + _parse_kb_data(hw, kb, data); + + return kb; +} + +/** + * ice_xlt_kb_get_sw - create switch xlt key build + * @ice_hw: pointer to the hardware structure + */ +struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw) +{ + return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_SW); +} + +/** + * ice_xlt_kb_get_acl - create acl xlt key build + * @ice_hw: pointer to the hardware structure + */ +struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw) +{ + return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_ACL); +} + +/** + * ice_xlt_kb_get_fd - create fdir xlt key build + * @ice_hw: pointer to the hardware structure + */ +struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw) +{ + return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_FD); +} + +/** + * ice_xlt_kb_get_fd - create rss xlt key build + * @ice_hw: pointer to the hardware structure + */ +struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw) +{ + return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_RSS); +} diff --git a/drivers/net/ice/base/ice_xlt_kb.h b/drivers/net/ice/base/ice_xlt_kb.h new file mode 100644 index 0000000000..a95d845f89 --- /dev/null +++ b/drivers/net/ice/base/ice_xlt_kb.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2001-2021 Intel Corporation + */ + +#ifndef _ICE_XLT_KB_H_ +#define _ICE_XLT_KB_H_ + +#define ICE_XLT_KB_TBL_CNT 8 +#define ICE_XLT_KB_FLAG0_14_CNT 15 + +struct ice_xlt_kb_entry { + u8 xlt1_ad_sel; + u8 xlt2_ad_sel; + u16 flg0_14_sel[ICE_XLT_KB_FLAG0_14_CNT]; + u8 xlt1_md_sel; + u8 xlt2_md_sel; +}; + +struct ice_xlt_kb { + u8 xlt1_pm; + u8 xlt2_pm; + u8 prof_id_pm; + u64 flag15; + + struct ice_xlt_kb_entry entries[ICE_XLT_KB_TBL_CNT]; +}; + +void ice_xlt_kb_dump(struct ice_hw *hw, struct ice_xlt_kb *kb); +struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw); +struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw); +struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw); +struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw); +#endif /* _ICE_XLT_KB_H */ diff --git a/drivers/net/ice/base/meson.build b/drivers/net/ice/base/meson.build index 9ce508c272..35f2ac2312 100644 --- a/drivers/net/ice/base/meson.build +++ b/drivers/net/ice/base/meson.build @@ -24,6 +24,7 @@ sources = [ 'ice_mk_grp.c', 'ice_proto_grp.c', 'ice_flg_rd.c', + 'ice_xlt_kb.c', ] error_cflags = [