From patchwork Fri Sep 17 11:02:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 99126 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4D0FEA0C46; Fri, 17 Sep 2021 13:01:43 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0A4624113A; Fri, 17 Sep 2021 13:00:05 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id EA44941164 for ; Fri, 17 Sep 2021 13:00:01 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10109"; a="286458749" X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="286458749" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2021 04:00:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,301,1624345200"; d="scan'208";a="699440953" Received: from dpdk51.sh.intel.com ([10.67.111.142]) by fmsmga006.fm.intel.com with ESMTP; 17 Sep 2021 04:00:00 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: junfeng.guo@intel.com, dev@dpdk.org, Qi Zhang Date: Fri, 17 Sep 2021 19:02:38 +0800 Message-Id: <20210917110242.3127658-17-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210917110242.3127658-1-qi.z.zhang@intel.com> References: <20210917110242.3127658-1-qi.z.zhang@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 16/20] net/ice/base: add helper function to aggregate flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add internal helper function ice_xlt_kb_flg_get to aggregate 64 bit packet flag into 16 bit key builder flags. Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_xlt_kb.c | 27 +++++++++++++++++++++++++++ drivers/net/ice/base/ice_xlt_kb.h | 1 + 2 files changed, 28 insertions(+) diff --git a/drivers/net/ice/base/ice_xlt_kb.c b/drivers/net/ice/base/ice_xlt_kb.c index 8b4043a836..4c1ab747cf 100644 --- a/drivers/net/ice/base/ice_xlt_kb.c +++ b/drivers/net/ice/base/ice_xlt_kb.c @@ -187,3 +187,30 @@ struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw) { return _xlt_kb_get(hw, ICE_SID_XLT_KEY_BUILDER_RSS); } + +/** + * ice_xlt_kb_flag_get - aggregate 64 bits packet flag into 16 bits xlt flag + * @kb: xlt key build + * @pkt_flag: 64 bits packet flag + */ +u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag) +{ + struct ice_xlt_kb_entry *entry = &kb->entries[0]; + u16 flg = 0; + int i; + + /* check flag 15 */ + if (kb->flag15 & pkt_flag) + flg = (u16)(1u << 15); + + /* check flag 0 - 14 */ + for (i = 0; i < 15; i++) { + /* only check first entry */ + u16 idx = (u16)(entry->flg0_14_sel[i] & 0x3f); + + if (pkt_flag & (1ul << idx)) + flg |= (u16)(1u << i); + } + + return flg; +} diff --git a/drivers/net/ice/base/ice_xlt_kb.h b/drivers/net/ice/base/ice_xlt_kb.h index a95d845f89..ec802b663a 100644 --- a/drivers/net/ice/base/ice_xlt_kb.h +++ b/drivers/net/ice/base/ice_xlt_kb.h @@ -30,4 +30,5 @@ struct ice_xlt_kb *ice_xlt_kb_get_sw(struct ice_hw *hw); struct ice_xlt_kb *ice_xlt_kb_get_acl(struct ice_hw *hw); struct ice_xlt_kb *ice_xlt_kb_get_fd(struct ice_hw *hw); struct ice_xlt_kb *ice_xlt_kb_get_rss(struct ice_hw *hw); +u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag); #endif /* _ICE_XLT_KB_H */