@@ -1209,6 +1209,12 @@ M: Kevin Laatz <kevin.laatz@intel.com>
F: drivers/dma/idxd/
F: doc/guides/dmadevs/idxd.rst
+Intel IOAT
+M: Bruce Richardson <bruce.richardson@intel.com>
+M: Conor Walsh <conor.walsh@intel.com>
+F: drivers/dma/ioat/
+F: doc/guides/dmadevs/ioat.rst
+
RegEx Drivers
-------------
@@ -12,3 +12,5 @@ an application through DMA API.
:numbered:
idxd
+ ioat
+
new file mode 100644
@@ -0,0 +1,69 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+ Copyright(c) 2021 Intel Corporation.
+
+.. include:: <isonum.txt>
+
+IOAT DMA Device Driver
+=======================
+
+The ``ioat`` dmadev driver provides a poll-mode driver (PMD) for Intel\
+|reg| QuickData Technology which is part of part of Intel\ |reg| I/O
+Acceleration Technology (`Intel I/OAT
+<https://www.intel.com/content/www/us/en/wireless-network/accel-technology.html>`_).
+This PMD, when used on supported hardware, allows data copies, for example,
+cloning packet data, to be accelerated by IOAT hardware rather than having to
+be done by software, freeing up CPU cycles for other tasks.
+
+Hardware Requirements
+----------------------
+
+The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the
+presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma``
+will show all the DMA devices on the system, IOAT devices are included in this
+list. For Intel\ |reg| IOAT devices, the hardware will often be listed as
+"Crystal Beach DMA", or "CBDMA" or on some newer systems '0b00' due to the
+absence of pci-id database entries for them at this point.
+
+.. note::
+ Error handling is not supported by this driver on hardware prior to
+ Intel Ice Lake. Unsupported systems include Broadwell, Skylake and
+ Cascade Lake.
+
+Compilation
+------------
+
+For builds using ``meson`` and ``ninja``, the driver will be built when the
+target platform is x86-based. No additional compilation steps are necessary.
+
+Device Setup
+-------------
+
+Intel\ |reg| IOAT devices will need to be bound to a suitable DPDK-supported
+user-space IO driver such as ``vfio-pci`` in order to be used by DPDK.
+
+The ``dpdk-devbind.py`` script can be used to view the state of the devices using::
+
+ $ dpdk-devbind.py --status-dev dma
+
+The ``dpdk-devbind.py`` script can also be used to bind devices to a suitable driver.
+For example::
+
+ $ dpdk-devbind.py -b vfio-pci 00:01.0 00:01.1
+
+Device Probing and Initialization
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+For devices bound to a suitable DPDK-supported driver (``vfio-pci``), the HW
+devices will be found as part of the device scan done at application
+initialization time without the need to pass parameters to the application.
+
+If the application does not require all the devices available an allowlist can
+be used in the same way that other DPDK devices use them.
+
+For example::
+
+ $ dpdk-test -a <b:d:f>
+
+Once probed successfully, the device will appear as a ``dmadev``, that is a
+"DMA device type" inside DPDK, and can be accessed using APIs from the
+``rte_dmadev`` library.
@@ -103,6 +103,12 @@ New Features
The IDXD dmadev driver provide device drivers for the Intel DSA devices.
This device driver can be used through the generic dmadev API.
+* **Added IOAT dmadev driver implementation.**
+
+ The Intel I/O Acceleration Technology (IOAT) dmadev driver provides a device
+ driver for Intel IOAT devices such as Crystal Beach DMA (CBDMA) on Ice Lake,
+ Skylake and Broadwell. This device driver can be used through the generic dmadev API.
+
Removed Items
-------------
new file mode 100644
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Intel Corporation
+ */
+
+#include <rte_bus_pci.h>
+#include <rte_dmadev_pmd.h>
+
+#include "ioat_internal.h"
+
+static struct rte_pci_driver ioat_pmd_drv;
+
+RTE_LOG_REGISTER_DEFAULT(ioat_pmd_logtype, INFO);
+
+#define IOAT_PMD_NAME dmadev_ioat
+#define IOAT_PMD_NAME_STR RTE_STR(IOAT_PMD_NAME)
+
+/* Probe DMA device. */
+static int
+ioat_dmadev_probe(struct rte_pci_driver *drv, struct rte_pci_device *dev)
+{
+ char name[32];
+
+ rte_pci_device_name(&dev->addr, name, sizeof(name));
+ IOAT_PMD_INFO("Init %s on NUMA node %d", name, dev->device.numa_node);
+
+ dev->device.driver = &drv->driver;
+ return 0;
+}
+
+/* Remove DMA device. */
+static int
+ioat_dmadev_remove(struct rte_pci_device *dev)
+{
+ char name[32];
+
+ rte_pci_device_name(&dev->addr, name, sizeof(name));
+
+ IOAT_PMD_INFO("Closing %s on NUMA node %d",
+ name, dev->device.numa_node);
+
+ return 0;
+}
+
+static const struct rte_pci_id pci_id_ioat_map[] = {
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_SKX) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX0) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX1) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX2) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX3) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX4) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX5) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX6) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDX7) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDXE) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_BDXF) },
+ { RTE_PCI_DEVICE(IOAT_VENDOR_ID, IOAT_DEVICE_ID_ICX) },
+ { .vendor_id = 0, /* sentinel */ },
+};
+
+static struct rte_pci_driver ioat_pmd_drv = {
+ .id_table = pci_id_ioat_map,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
+ .probe = ioat_dmadev_probe,
+ .remove = ioat_dmadev_remove,
+};
+
+RTE_PMD_REGISTER_PCI(IOAT_PMD_NAME, ioat_pmd_drv);
+RTE_PMD_REGISTER_PCI_TABLE(IOAT_PMD_NAME, pci_id_ioat_map);
+RTE_PMD_REGISTER_KMOD_DEP(IOAT_PMD_NAME, "* igb_uio | uio_pci_generic | vfio-pci");
new file mode 100644
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Intel Corporation
+ */
+
+#ifndef IOAT_HW_DEFS_H
+#define IOAT_HW_DEFS_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+#define IOAT_VER_3_0 0x30
+#define IOAT_VER_3_3 0x33
+
+#define IOAT_VENDOR_ID 0x8086
+#define IOAT_DEVICE_ID_SKX 0x2021
+#define IOAT_DEVICE_ID_BDX0 0x6f20
+#define IOAT_DEVICE_ID_BDX1 0x6f21
+#define IOAT_DEVICE_ID_BDX2 0x6f22
+#define IOAT_DEVICE_ID_BDX3 0x6f23
+#define IOAT_DEVICE_ID_BDX4 0x6f24
+#define IOAT_DEVICE_ID_BDX5 0x6f25
+#define IOAT_DEVICE_ID_BDX6 0x6f26
+#define IOAT_DEVICE_ID_BDX7 0x6f27
+#define IOAT_DEVICE_ID_BDXE 0x6f2E
+#define IOAT_DEVICE_ID_BDXF 0x6f2F
+#define IOAT_DEVICE_ID_ICX 0x0b00
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* IOAT_HW_DEFS_H */
new file mode 100644
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2021 Intel Corporation
+ */
+
+#ifndef _IOAT_INTERNAL_H_
+#define _IOAT_INTERNAL_H_
+
+#include "ioat_hw_defs.h"
+
+extern int ioat_pmd_logtype;
+
+#define IOAT_PMD_LOG(level, fmt, args...) rte_log(RTE_LOG_ ## level, \
+ ioat_pmd_logtype, "IOAT: %s(): " fmt "\n", __func__, ##args)
+
+#define IOAT_PMD_DEBUG(fmt, args...) IOAT_PMD_LOG(DEBUG, fmt, ## args)
+#define IOAT_PMD_INFO(fmt, args...) IOAT_PMD_LOG(INFO, fmt, ## args)
+#define IOAT_PMD_ERR(fmt, args...) IOAT_PMD_LOG(ERR, fmt, ## args)
+#define IOAT_PMD_WARN(fmt, args...) IOAT_PMD_LOG(WARNING, fmt, ## args)
+
+#endif /* _IOAT_INTERNAL_H_ */
new file mode 100644
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2021 Intel Corporation
+
+build = dpdk_conf.has('RTE_ARCH_X86')
+reason = 'only supported on x86'
+sources = files('ioat_dmadev.c')
+deps += ['bus_pci', 'dmadev']
new file mode 100644
@@ -0,0 +1,3 @@
+DPDK_22 {
+ local: *;
+};
@@ -3,6 +3,7 @@
drivers = [
'idxd',
+ 'ioat',
'skeleton',
]
std_deps = ['dmadev']