From patchwork Fri Oct 1 13:40:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 100271 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9554AA0032; Fri, 1 Oct 2021 15:43:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 739BB411ED; Fri, 1 Oct 2021 15:41:43 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id A6C54411ED for ; Fri, 1 Oct 2021 15:41:41 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1919hdgU021700 for ; Fri, 1 Oct 2021 06:41:41 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=ji/J/shiSUFZQ7ipNmPQBvS7P12dADHQIh9Q+VuGM9U=; b=I2UNe5qlYLhC3s8hOBafjRJBMeLID0CpcgtUarfSKRZGEIbJrONqnCSAh3hHIIMgt4Xz qPeuxNdCDhimKZfN6PBJz4e/KbPpwQlk4UNAphNlnr3eRq+Z0dSKmZuejPa+52T3xnCh Ep/Tkg38jPSNEOnmGJfZKf4xBVxyCAM8WUJLr/c7IRnhZHBLZePxFb3EYaJ8q5Tqsoc6 vtuKjeyIS7Bj46ai+aQEc+KOaUp8wFW2/qZL3MizoQlE6D9R0ZiboB+H3mEKRuRGxnql d8rHobnonrQabpUzCF3tnsyRsPaay7ISTCQTkd0uWrBmC35Q6gh7q7PideYlv+Ru0iOZ 8g== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3bdrxmhxe9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 01 Oct 2021 06:41:40 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 1 Oct 2021 06:41:38 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 1 Oct 2021 06:41:39 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id DB4C43F7043; Fri, 1 Oct 2021 06:41:36 -0700 (PDT) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Srujana Challa Date: Fri, 1 Oct 2021 19:10:19 +0530 Message-ID: <20211001134022.22700-26-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20211001134022.22700-1-ndabilpuram@marvell.com> References: <20210902021505.17607-1-ndabilpuram@marvell.com> <20211001134022.22700-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: LL4pP4fPJdR8dtDfZfAAH-MQOKLbTuvV X-Proofpoint-ORIG-GUID: LL4pP4fPJdR8dtDfZfAAH-MQOKLbTuvV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-10-01_02,2021-10-01_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v3 25/28] net/cnxk: allow zero udp6 checksum for non inline device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Srujana Challa Sets IP6_UDP_OPT in NIX RX config to allow optional UDP checksum for IPv6 in case of security offload. Also disable drop_re when inline inbound is enabled. Signed-off-by: Srujana Challa --- drivers/net/cnxk/cn10k_ethdev.c | 5 +++++ drivers/net/cnxk/cnxk_ethdev.c | 9 +++++++++ drivers/net/cnxk/cnxk_ethdev.h | 1 + 3 files changed, 15 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index fa2343c..9dfea99 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -553,6 +553,11 @@ cn10k_nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) dev = cnxk_eth_pmd_priv(eth_dev); + /* DROP_RE is not supported with inline IPSec for CN10K A0 */ + if (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || + roc_model_is_cnf10kb_a0()) + dev->ipsecd_drop_re_dis = 1; + /* Register up msg callbacks for PTP information */ roc_nix_ptp_info_cb_register(&dev->nix, cn10k_nix_ptp_info_update_cb); diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index a2e134c..fa9a26f 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1021,6 +1021,15 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) ROC_NIX_LF_RX_CFG_LEN_IL4 | ROC_NIX_LF_RX_CFG_LEN_IL3 | ROC_NIX_LF_RX_CFG_LEN_OL4 | ROC_NIX_LF_RX_CFG_LEN_OL3); + if (dev->rx_offloads & DEV_RX_OFFLOAD_SECURITY) { + rx_cfg |= ROC_NIX_LF_RX_CFG_IP6_UDP_OPT; + /* Disable drop re if rx offload security is enabled and + * platform does not support it. + */ + if (dev->ipsecd_drop_re_dis) + rx_cfg &= ~(ROC_NIX_LF_RX_CFG_DROP_RE); + } + nb_rxq = RTE_MAX(data->nb_rx_queues, 1); nb_txq = RTE_MAX(data->nb_tx_queues, 1); diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 88589d3..3601e4d 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -269,6 +269,7 @@ struct cnxk_eth_dev { union { struct { uint64_t cq_min_4k : 1; + uint64_t ipsecd_drop_re_dis : 1; }; uint64_t hwcap; };