[10/12] net/mlx5: support VLAN stripping offload on Windows
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Commit Message
Support of the VLAN stripping offloading by checking
the relevant FW capability (vlan_cap) for NIC support.
Supported offload:
DEV_RX_OFFLOAD_VLAN_STRIP
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
drivers/net/mlx5/windows/mlx5_flow_os.h | 1 +
drivers/net/mlx5/windows/mlx5_os.c | 5 +++--
2 files changed, 4 insertions(+), 2 deletions(-)
@@ -44,6 +44,7 @@ mlx5_flow_os_item_supported(int item)
case RTE_FLOW_ITEM_TYPE_UDP:
case RTE_FLOW_ITEM_TYPE_TCP:
case RTE_FLOW_ITEM_TYPE_IPV6:
+ case RTE_FLOW_ITEM_TYPE_VLAN:
return true;
default:
return false;
@@ -489,8 +489,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
config->ind_table_max_size);
- DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
- (config->hw_vlan_strip ? "" : "not "));
if (config->hw_padding) {
DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
config->hw_padding = 0;
@@ -524,6 +522,9 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
config->hw_csum = config->hca_attr.csum_cap;
DRV_LOG(DEBUG, "checksum offloading is %ssupported",
(config->hw_csum ? "" : "not "));
+ config->hw_vlan_strip = config->hca_attr.vlan_cap;
+ DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
+ (config->hw_vlan_strip ? "" : "not "));
}
if (config->devx) {
uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];