diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index 60963a8208..bbf310166e 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -6,7 +6,6 @@
 
 #include <rte_common.h>
 #include <rte_hexdump.h>
-#include <rte_cryptodev.h>
 #include <cryptodev_pmd.h>
 #include <rte_bus_vdev.h>
 #include <rte_malloc.h>
diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h
index ca5145c278..85c8fc47a2 100644
--- a/drivers/crypto/ccp/ccp_dev.h
+++ b/drivers/crypto/ccp/ccp_dev.h
@@ -17,7 +17,7 @@
 #include <rte_pci.h>
 #include <rte_spinlock.h>
 #include <rte_crypto_sym.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 
 /**< CCP sspecific */
 #define MAX_HW_QUEUES                   5
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c
index defc792aa8..27df1dcd64 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.c
+++ b/drivers/crypto/cnxk/cn10k_ipsec.c
@@ -3,7 +3,7 @@
  */
 
 #include <rte_malloc.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_esp.h>
 #include <rte_ip.h>
 #include <rte_security.h>
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c
index 9ca4d20c62..53fb793654 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.c
+++ b/drivers/crypto/cnxk/cn9k_ipsec.c
@@ -2,7 +2,7 @@
  * Copyright(C) 2021 Marvell.
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_ip.h>
 #include <rte_security.h>
 #include <rte_security_driver.h>
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
index a227e6981c..a53b489a04 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
@@ -2,7 +2,7 @@
  * Copyright(C) 2021 Marvell.
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_security.h>
 
 #include "roc_api.h"
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
index 8d04d4b575..2021d5c77e 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c
@@ -2,7 +2,7 @@
  * Copyright(C) 2021 Marvell.
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_malloc.h>
 #include <rte_security.h>
 #include <rte_security_driver.h>
diff --git a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
index fe3ca25a0c..9edb0cc00f 100644
--- a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
+++ b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c
@@ -3,7 +3,7 @@
  */
 
 #include <rte_crypto.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_cycles.h>
 #include <rte_errno.h>
 
diff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c
index c294f86d79..d09a17bb80 100644
--- a/drivers/crypto/octeontx/otx_cryptodev.c
+++ b/drivers/crypto/octeontx/otx_cryptodev.c
@@ -4,7 +4,6 @@
 
 #include <rte_bus_pci.h>
 #include <rte_common.h>
-#include <rte_cryptodev.h>
 #include <cryptodev_pmd.h>
 #include <rte_log.h>
 #include <rte_pci.h>
diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
index 7b89a62d81..20b288334a 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
@@ -7,7 +7,7 @@
 
 #include <rte_branch_prediction.h>
 #include <rte_common.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_errno.h>
 #include <rte_mempool.h>
 #include <rte_memzone.h>
diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
index 7c6b1e45b4..e48805fb09 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
@@ -7,7 +7,7 @@
 #include <stdbool.h>
 
 #include <rte_branch_prediction.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_cycles.h>
 #include <rte_io.h>
 #include <rte_memory.h>
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.h b/drivers/crypto/octeontx/otx_cryptodev_ops.h
index f234f16970..83b82ea059 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_ops.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.h
@@ -5,7 +5,7 @@
 #ifndef _OTX_CRYPTODEV_OPS_H_
 #define _OTX_CRYPTODEV_OPS_H_
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 
 #define OTX_CPT_MIN_HEADROOM_REQ	(24)
 #define OTX_CPT_MIN_TAILROOM_REQ	(8)
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
index 1a8edae7eb..f9e7b0b474 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright (C) 2019 Marvell International Ltd.
  */
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_ethdev.h>
 
 #include "otx2_cryptodev.h"
diff --git a/drivers/crypto/scheduler/scheduler_failover.c b/drivers/crypto/scheduler/scheduler_failover.c
index 844312dd1b..5023577ef8 100644
--- a/drivers/crypto/scheduler/scheduler_failover.c
+++ b/drivers/crypto/scheduler/scheduler_failover.c
@@ -2,7 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_malloc.h>
 
 #include "rte_cryptodev_scheduler_operations.h"
diff --git a/drivers/crypto/scheduler/scheduler_multicore.c b/drivers/crypto/scheduler/scheduler_multicore.c
index 1e2e8dbf9f..900ab4049d 100644
--- a/drivers/crypto/scheduler/scheduler_multicore.c
+++ b/drivers/crypto/scheduler/scheduler_multicore.c
@@ -3,7 +3,7 @@
  */
 #include <unistd.h>
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_malloc.h>
 
 #include "rte_cryptodev_scheduler_operations.h"
diff --git a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
index 57e330a744..933a5c6978 100644
--- a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
+++ b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
@@ -2,7 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_malloc.h>
 
 #include "rte_cryptodev_scheduler_operations.h"
diff --git a/drivers/crypto/scheduler/scheduler_roundrobin.c b/drivers/crypto/scheduler/scheduler_roundrobin.c
index bc4a632106..ace2dec2ec 100644
--- a/drivers/crypto/scheduler/scheduler_roundrobin.c
+++ b/drivers/crypto/scheduler/scheduler_roundrobin.c
@@ -2,7 +2,7 @@
  * Copyright(c) 2017 Intel Corporation
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_malloc.h>
 
 #include "rte_cryptodev_scheduler_operations.h"
diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index 8a5c737e4b..b57004c0dc 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -7,7 +7,7 @@
 
 #include <string.h>
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_devargs.h>
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c
index ec74160325..1d7ddfe1d1 100644
--- a/drivers/event/dpaa/dpaa_eventdev.c
+++ b/drivers/event/dpaa/dpaa_eventdev.c
@@ -28,7 +28,7 @@
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
 #include <rte_event_eth_tx_adapter.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_dpaa_bus.h>
 #include <rte_dpaa_logs.h>
 #include <rte_cycles.h>
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
index 5ccf22f77f..e03afb2958 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -25,7 +25,7 @@
 #include <rte_pci.h>
 #include <rte_bus_vdev.h>
 #include <ethdev_driver.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_event_eth_rx_adapter.h>
 #include <rte_event_eth_tx_adapter.h>
 
diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index b93f6ec8c6..9846fce34b 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -5,7 +5,7 @@
 #include <inttypes.h>
 
 #include <rte_common.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_debug.h>
 #include <rte_dev.h>
 #include <rte_eal.h>
diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
index d9a002625c..d59d6c53f6 100644
--- a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
@@ -2,7 +2,7 @@
  * Copyright (C) 2020-2021 Marvell.
  */
 
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
 #include <rte_eventdev.h>
 
 #include "otx2_cryptodev.h"
diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index a71edbb991..0d1bef0e67 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -52,6 +52,71 @@ struct rte_cryptodev_pmd_init_params {
 	unsigned int max_nb_queue_pairs;
 };
 
+/**
+ * @internal
+ * The data part, with no function pointers, associated with each device.
+ *
+ * This structure is safe to place in shared memory to be common among
+ * different processes in a multi-process configuration.
+ */
+struct rte_cryptodev_data {
+	/** Device ID for this instance */
+	uint8_t dev_id;
+	/** Socket ID where memory is allocated */
+	uint8_t socket_id;
+	/** Unique identifier name */
+	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+
+	__extension__
+	/** Device state: STARTED(1)/STOPPED(0) */
+	uint8_t dev_started : 1;
+
+	/** Session memory pool */
+	struct rte_mempool *session_pool;
+	/** Array of pointers to queue pairs. */
+	void **queue_pairs;
+	/** Number of device queue pairs. */
+	uint16_t nb_queue_pairs;
+
+	/** PMD-specific private data */
+	void *dev_private;
+} __rte_cache_aligned;
+
+/** @internal The data structure associated with each crypto device. */
+struct rte_cryptodev {
+	/** Pointer to PMD dequeue function. */
+	dequeue_pkt_burst_t dequeue_burst;
+	/** Pointer to PMD enqueue function. */
+	enqueue_pkt_burst_t enqueue_burst;
+
+	/** Pointer to device data */
+	struct rte_cryptodev_data *data;
+	/** Functions exported by PMD */
+	struct rte_cryptodev_ops *dev_ops;
+	/** Feature flags exposes HW/SW features for the given device */
+	uint64_t feature_flags;
+	/** Backing device */
+	struct rte_device *device;
+
+	/** Crypto driver identifier*/
+	uint8_t driver_id;
+
+	/** User application callback for interrupts if present */
+	struct rte_cryptodev_cb_list link_intr_cbs;
+
+	/** Context for security ops */
+	void *security_ctx;
+
+	__extension__
+	/** Flag indicating the device is attached */
+	uint8_t attached : 1;
+
+	/** User application callback for pre enqueue processing */
+	struct rte_cryptodev_cb_rcu *enq_cbs;
+	/** User application callback for post dequeue processing */
+	struct rte_cryptodev_cb_rcu *deq_cbs;
+} __rte_cache_aligned;
+
 /** Global structure used for maintaining state of allocated crypto devices */
 struct rte_cryptodev_global {
 	struct rte_cryptodev *devs;	/**< Device information array */
diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h
index bac5f8d984..47d3985c25 100644
--- a/lib/cryptodev/rte_cryptodev_core.h
+++ b/lib/cryptodev/rte_cryptodev_core.h
@@ -54,73 +54,6 @@ struct rte_crypto_fp_ops {
 
 extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS];
 
-/**
- * @internal
- * The data part, with no function pointers, associated with each device.
- *
- * This structure is safe to place in shared memory to be common among
- * different processes in a multi-process configuration.
- */
-struct rte_cryptodev_data {
-	uint8_t dev_id;
-	/**< Device ID for this instance */
-	uint8_t socket_id;
-	/**< Socket ID where memory is allocated */
-	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
-	/**< Unique identifier name */
-
-	__extension__
-	uint8_t dev_started : 1;
-	/**< Device state: STARTED(1)/STOPPED(0) */
-
-	struct rte_mempool *session_pool;
-	/**< Session memory pool */
-	void **queue_pairs;
-	/**< Array of pointers to queue pairs. */
-	uint16_t nb_queue_pairs;
-	/**< Number of device queue pairs. */
-
-	void *dev_private;
-	/**< PMD-specific private data */
-} __rte_cache_aligned;
-
-
-/** @internal The data structure associated with each crypto device. */
-struct rte_cryptodev {
-	dequeue_pkt_burst_t dequeue_burst;
-	/**< Pointer to PMD receive function. */
-	enqueue_pkt_burst_t enqueue_burst;
-	/**< Pointer to PMD transmit function. */
-
-	struct rte_cryptodev_data *data;
-	/**< Pointer to device data */
-	struct rte_cryptodev_ops *dev_ops;
-	/**< Functions exported by PMD */
-	uint64_t feature_flags;
-	/**< Feature flags exposes HW/SW features for the given device */
-	struct rte_device *device;
-	/**< Backing device */
-
-	uint8_t driver_id;
-	/**< Crypto driver identifier*/
-
-	struct rte_cryptodev_cb_list link_intr_cbs;
-	/**< User application callback for interrupts if present */
-
-	void *security_ctx;
-	/**< Context for security ops */
-
-	__extension__
-	uint8_t attached : 1;
-	/**< Flag indicating the device is attached */
-
-	struct rte_cryptodev_cb_rcu *enq_cbs;
-	/**< User application callback for pre enqueue processing */
-
-	struct rte_cryptodev_cb_rcu *deq_cbs;
-	/**< User application callback for post dequeue processing */
-} __rte_cache_aligned;
-
 /**
  * The pool of rte_cryptodev structures.
  */
diff --git a/lib/cryptodev/version.map b/lib/cryptodev/version.map
index ed62ced221..cd56ad52e2 100644
--- a/lib/cryptodev/version.map
+++ b/lib/cryptodev/version.map
@@ -43,7 +43,6 @@ DPDK_22 {
 	rte_cryptodev_sym_session_create;
 	rte_cryptodev_sym_session_free;
 	rte_cryptodev_sym_session_init;
-	rte_cryptodevs;
 
 	#added in 21.11
 	rte_crypto_fp_ops;
@@ -124,4 +123,5 @@ INTERNAL {
 	rte_cryptodev_pmd_get_named_dev;
 	rte_cryptodev_pmd_parse_input_args;
 	rte_cryptodev_pmd_release_device;
+	rte_cryptodevs;
 };
