diff mbox series

[3/5] crypto/mlx5: use OS agnostic functions for UMEM operations

Message ID 20211012155359.8908-4-talshn@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series Support MLX5 crypto driver on Windows |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tal Shnaiderman Oct. 12, 2021, 3:53 p.m. UTC 
  use the functions mlx5_os_umem_reg, mlx5_os_umem_dereg
mlx5_os_get_umem_id instead of the glue functions to support
UMEM operations on all OSs.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/crypto/mlx5/mlx5_crypto.c | 8 ++++----
 drivers/crypto/mlx5/mlx5_crypto.h | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c
index 791bec03f9..11cbc78586 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.c
+++ b/drivers/crypto/mlx5/mlx5_crypto.c
@@ -272,7 +272,7 @@  mlx5_crypto_qp_release(struct mlx5_crypto_qp *qp)
 	if (qp->qp_obj != NULL)
 		claim_zero(mlx5_devx_cmd_destroy(qp->qp_obj));
 	if (qp->umem_obj != NULL)
-		claim_zero(mlx5_glue->devx_umem_dereg(qp->umem_obj));
+		claim_zero(mlx5_os_umem_dereg(qp->umem_obj));
 	if (qp->umem_buf != NULL)
 		rte_free(qp->umem_buf);
 	mlx5_mr_btree_free(&qp->mr_ctrl.cache_bh);
@@ -671,7 +671,7 @@  mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 		rte_errno = ENOMEM;
 		goto error;
 	}
-	qp->umem_obj = mlx5_glue->devx_umem_reg(priv->cdev->ctx,
+	qp->umem_obj = mlx5_os_umem_reg(priv->cdev->ctx,
 					       (void *)(uintptr_t)qp->umem_buf,
 					       umem_size,
 					       IBV_ACCESS_LOCAL_WRITE);
@@ -693,9 +693,9 @@  mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 	attr.rq_size = 0;
 	attr.sq_size = RTE_BIT32(log_nb_desc);
 	attr.dbr_umem_valid = 1;
-	attr.wq_umem_id = qp->umem_obj->umem_id;
+	attr.wq_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
 	attr.wq_umem_offset = 0;
-	attr.dbr_umem_id = qp->umem_obj->umem_id;
+	attr.dbr_umem_id = mlx5_os_get_umem_id(qp->umem_obj);
 	attr.ts_format =
 		mlx5_ts_format_conv(priv->cdev->config.hca_attr.qp_ts_format);
 	attr.dbr_address = RTE_BIT64(log_nb_desc) * priv->wqe_set_size;
diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index 09acc85a56..ef0f383b52 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -42,7 +42,7 @@  struct mlx5_crypto_qp {
 	struct mlx5_devx_cq cq_obj;
 	struct mlx5_devx_obj *qp_obj;
 	struct rte_cryptodev_stats stats;
-	struct mlx5dv_devx_umem *umem_obj;
+	void *umem_obj;
 	void *umem_buf;
 	volatile uint32_t *db_rec;
 	struct rte_crypto_op **ops;