From patchwork Mon Oct 18 12:38:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Walsh X-Patchwork-Id: 102013 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8F34FA0C43; Mon, 18 Oct 2021 14:39:32 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F0CFB41130; Mon, 18 Oct 2021 14:39:03 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 88115410F6 for ; Mon, 18 Oct 2021 14:39:02 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10140"; a="228117670" X-IronPort-AV: E=Sophos;i="5.85,382,1624345200"; d="scan'208";a="228117670" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2021 05:39:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,382,1624345200"; d="scan'208";a="661361139" Received: from silpixa00401160.ir.intel.com ([10.55.129.96]) by orsmga005.jf.intel.com with ESMTP; 18 Oct 2021 05:38:59 -0700 From: Conor Walsh To: bruce.richardson@intel.com, thomas@monjalon.net, fengchengwen@huawei.com, jerinj@marvell.com, kevin.laatz@intel.com Cc: dev@dpdk.org, Conor Walsh Date: Mon, 18 Oct 2021 12:38:31 +0000 Message-Id: <20211018123835.1080174-9-conor.walsh@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211018123835.1080174-1-conor.walsh@intel.com> References: <20210827172550.1522362-1-conor.walsh@intel.com> <20211018123835.1080174-1-conor.walsh@intel.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v8 08/12] dma/ioat: add statistics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add statistic tracking for operations in IOAT. Signed-off-by: Conor Walsh Reviewed-by: Kevin Laatz Acked-by: Bruce Richardson --- drivers/dma/ioat/ioat_dmadev.c | 43 ++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/dma/ioat/ioat_dmadev.c b/drivers/dma/ioat/ioat_dmadev.c index 0318f67772..48126a1bcb 100644 --- a/drivers/dma/ioat/ioat_dmadev.c +++ b/drivers/dma/ioat/ioat_dmadev.c @@ -77,6 +77,9 @@ ioat_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan __rte_unused, ioat->offset = 0; ioat->failure = 0; + /* Reset Stats. */ + ioat->stats = (struct rte_dma_stats){0}; + /* Configure descriptor ring - each one points to next. */ for (i = 0; i < ioat->qcfg.nb_desc; i++) { ioat->desc_ring[i].next = ioat->ring_addr + @@ -222,6 +225,8 @@ __submit(struct ioat_dmadev *ioat) { *ioat->doorbell = ioat->next_write - ioat->offset; + ioat->stats.submitted += (uint16_t)(ioat->next_write - ioat->last_write); + ioat->last_write = ioat->next_write; } @@ -352,6 +357,10 @@ __dev_dump(void *dev_private, FILE *f) fprintf(f, " Dest: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & mask].dest_addr); fprintf(f, " Next: 0x%"PRIx64"\n", ioat->desc_ring[ioat->next_read & mask].next); fprintf(f, " }\n"); + fprintf(f, " Key Stats { submitted: %"PRIu64", comp: %"PRIu64", failed: %"PRIu64" }\n", + ioat->stats.submitted, + ioat->stats.completed, + ioat->stats.errors); return 0; } @@ -448,6 +457,9 @@ ioat_completed(void *dev_private, uint16_t qid __rte_unused, const uint16_t max_ *last_idx = ioat->next_read - 2; } + ioat->stats.completed += count; + ioat->stats.errors += fails; + return count; } @@ -498,9 +510,38 @@ ioat_completed_status(void *dev_private, uint16_t qid __rte_unused, *last_idx = ioat->next_read - 1; + ioat->stats.completed += count; + ioat->stats.errors += fails; + return count; } +/* Retrieve the generic stats of a DMA device. */ +static int +ioat_stats_get(const struct rte_dma_dev *dev, uint16_t vchan __rte_unused, + struct rte_dma_stats *rte_stats, uint32_t size) +{ + struct rte_dma_stats *stats = (&((struct ioat_dmadev *)dev->fp_obj->dev_private)->stats); + + if (size < sizeof(rte_stats)) + return -EINVAL; + if (rte_stats == NULL) + return -EINVAL; + + *rte_stats = *stats; + return 0; +} + +/* Reset the generic stat counters for the DMA device. */ +static int +ioat_stats_reset(struct rte_dma_dev *dev, uint16_t vchan __rte_unused) +{ + struct ioat_dmadev *ioat = dev->fp_obj->dev_private; + + ioat->stats = (struct rte_dma_stats){0}; + return 0; +} + /* Create a DMA device. */ static int ioat_dmadev_create(const char *name, struct rte_pci_device *dev) @@ -512,6 +553,8 @@ ioat_dmadev_create(const char *name, struct rte_pci_device *dev) .dev_info_get = ioat_dev_info_get, .dev_start = ioat_dev_start, .dev_stop = ioat_dev_stop, + .stats_get = ioat_stats_get, + .stats_reset = ioat_stats_reset, .vchan_setup = ioat_vchan_setup, };